1%default { "func":"dvmInterpHandlePackedSwitch" }
2%verify executed
3    /*
4     * Handle a packed-switch or sparse-switch instruction.  In both cases
5     * we decode it and hand it off to a helper function.
6     *
7     * We don't really expect backward branches in a switch statement, but
8     * they're perfectly legal, so we check for them here.
9     *
10     * When the JIT is present, all targets are considered treated as
11     * a potential trace heads regardless of branch direction.
12     *
13     * for: packed-switch, sparse-switch
14     */
15    /* op vAA, +BBBB */
16    FETCH(r0, 1)                        @ r0<- bbbb (lo)
17    FETCH(r1, 2)                        @ r1<- BBBB (hi)
18    mov     r3, rINST, lsr #8           @ r3<- AA
19    orr     r0, r0, r1, lsl #16         @ r0<- BBBBbbbb
20    GET_VREG(r1, r3)                    @ r1<- vAA
21    add     r0, rPC, r0, lsl #1         @ r0<- PC + BBBBbbbb*2
22    bl      $func                       @ r0<- code-unit branch offset
23    adds    r1, r0, r0                  @ r1<- byte offset; clear V
24#if defined(WITH_JIT)
25    ldr     r0, [rSELF, #offThread_pJitProfTable]
26    ldrle   rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
27    FETCH_ADVANCE_INST_RB(r1)           @ update rPC, load rINST
28    cmp     r0, #0
29    bne     common_updateProfile
30#else
31    ldrle   rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
32    FETCH_ADVANCE_INST_RB(r1)           @ update rPC, load rINST
33#endif
34    GET_INST_OPCODE(ip)                 @ extract opcode from rINST
35    GOTO_OPCODE(ip)                     @ jump to next instruction
36