History log of /external/llvm/test/MC/ARM/basic-thumb2-instructions.s
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1b91231347c00bf1be46bdd5b27ae8c45fdc0d0c 08-Nov-2013 Artyom Skrobov <Artyom.Skrobov@arm.com> [ARM] In ARMAsmParser, MatchCoprocessorOperandName() permitted p10 and p11 as operands for coprocessor instructions, resulting in encodings that clash with FP/NEON instruction encodings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194253 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
3d478aee8e2480661cb0d98b10da8ad2ebf59fcf 28-Oct-2013 Lang Hames <lhames@gmail.com> Return early from getUnconditionalBranchTargetOpValue if the branch target is
an MCExpr, in order to avoid writing an encoded zero value in the immediate
field.

When getUnconditionalBranchTargetOpValue is called with an MCExpr target, we
don't know what the final immediate field value should be. We shouldn't
explicitly set the immediate field to an encoded zero value as zero is encoded
with a non-zero bit pattern. This leads to bits being set that pollute the
final immediate value. The nature of the encoding is such that the polluted
bits only affect very large immediate values, explaining why this hasn't
caused problems earlier.

Fixes <rdar://problem/15155975>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193535 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
b161955ffbda5ccb5293e0c76ef982acb6ec6661 23-Oct-2013 Artyom Skrobov <Artyom.Skrobov@arm.com> Make ARM hint ranges consistent, and add tests for these ranges

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
485333df7157d6e8681d910d85b271b0bc96b48e 18-Oct-2013 Richard Barton <richard.barton@arm.com> Add hint disassembly syntax for 16-bit Thumb hint instructions.

Patch by Artyom Skrobov



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192972 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1a9f21abac47dcea0c62341b0ee4fd35481350b8 21-Aug-2013 Mihai Popa <mihail.popa@gmail.com> Make "mov" work for all Thumb2 MOV encodings

According to the ARM specification, "mov" is a valid mnemonic for all Thumb2 MOV encodings.
To achieve this, the patch adds one instruction alias with a special range condition to avoid collision with the Thumb1 MOV.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
756e89c8c2a3c30ce3a73ed13724aad1b41a5608 19-Aug-2013 Mihai Popa <mihail.popa@gmail.com> Thumb2 add immediate alias for SP

The Thumb2 add immediate is in fact defined for SP. The manual is misleading as it points to a different section for add immediate with SP, however the encoding is the same as for add immediate with register only with the SP operand hard coded. As such add immediate with SP and add immediate with register can safely be treated as the same instruction.

All the patch does is adjust a register constraint on an instruction alias.



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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e97fc44045732de9fc4715241013f9238ec007dc 16-Aug-2013 Mihai Popa <mihail.popa@gmail.com> Add support for Thumb2 literal loads with negative zero offset

Thumb2 literal loads use an offset encoding which allows for
negative zero. This fixes parsing and encoding so that #-0
is correctly processed. The parser represents #-0 as INT32_MIN.



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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8b36f9e4314ac4d786d2d4fd5fa9e7858487ee9e 16-Aug-2013 Mihai Popa <mihail.popa@gmail.com> Fix Thumb2 aliasing complementary instructions taking modified immediates

There are many Thumb instructions which take 12-bit immediates encoded in a special
8-byte value + 4-byte rotator form. Not all numbers are represented, and it's legal
to transform an assembly instruction to be able to encode the immediate.

For example: AND and BIC are complementary instructions; one can switch the AND
to a BIC as long as the immediate is complemented.

The intent is to switch one instruction into its complementary one when the immediate
cannot be encoded in the form requested in the original assembly and when the
complementary immediate is encodable.

The patch addresses two issues:
1. definition of t2SOImmNot immediate - it has to check that the orignal value is
not encoded naturally
2. t2AND and t2BIC instruction aliases which should use the Thumb2 SOImm operand
rather than the ARM one.



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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
428715d4e120e6ef6fc898665607a92f3dd02709 15-Aug-2013 Mihai Popa <mihail.popa@gmail.com> This fixes three issues related to Thumb literal loads:

1. The offset range for Thumb1 PC relative loads is [0..1020] and not [-1024..1020]
2. Thumb2 PC relative loads may define the PC, so the restriction placed on target register is removed
3. Removes unneeded alias between "ldr.n" and t1LDRpci. ".n" is actually stripped by both tablegen
and the ASM parser, so this alias rule really does nothing


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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
04b03fac11f10c92cf7ce63ba2f548a42ee2c448 09-Aug-2013 Mihai Popa <mihail.popa@gmail.com> This fixes the Thumb2 CPS assembly syntax.
In Thumb1, only one variant is supported: CPS{effect} {flags}

Thumb2 supports three:
CPS{effect}.W {flags}
CPS{effect} {flags} {mode}
CPS {mode}

Canonically, .W should be used only when ambiguity is present between encodings of different width.
The wide suffix is still accepted for the latter two forms via aliases.


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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e921f323533ee751b3fa34bd00d10fa72096ffd3 09-Aug-2013 Mihai Popa <mihail.popa@gmail.com> Fix assembling of Thumb2 branch instructions.

The long encoding for Thumb2 unconditional branches is broken.
Additionally, there is no range checking for target operands; as such
for instructions originating in assembly code, only short Thumb encodings
are generated, regardless of the bitsize needed for the offset.

Adding range checking is non trivial due to the representation of Thumb
branch instructions. There is no true difference between conditional and
unconditional branches in terms of operands and syntax - even unconditional
branches have a predicate which is expected to match that of the IT block
they are in. Yet, the encodings and the permitted size of the offset differ.

Due to this, for any mnemonic there are really 4 encodings to choose for.

The problem cannot be handled in the parser alone or by manipulating td files.
Because the parser builds first a set of match candidates and then checks them
one by one, whatever tablegen-only solution might be found will ultimately be
dependent of the parser's evaluation order. What's worse is that due to the fact
that all branches have the same syntax and the same kinds of operands, that
order is governed by the lexicographical ordering of the names of operand
classes...

To circumvent all this, any necessary disambiguation is added to the instruction
validation pass.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
4a378b95aa0f24ba461e512608b8aaeaa803996f 06-Aug-2013 Mihai Popa <mihail.popa@gmail.com> Support APSR_nzcv as operand for Thumb2 mrc. Deprecate pre-UAL syntax (pc instead of apsr_nzcv)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187803 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e38070fc32818a6e412dafbb8b3807b413d0819e 31-Jul-2013 Kevin Enderby <enderby@apple.com> Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.
While the .td entry is nice and all, it takes a pretty gross hack in
ARMAsmParser::ParseInstruction() because of handling of other "subs"
instructions to get it to match. Ran it by Jim Grosbach and he said it was
about what he expected to make this work given the existing code.

rdar://14214063


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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
02265382929b0275d7b7b334eab5e2fd34e1b9fe 22-Jul-2013 Mihai Popa <mihail.popa@gmail.com> This adds range checking for "ldr Rn, [pc, #imm]" Thumb
instructions. With this patch:

1. ldr.n is recognized as mnemonic for the short encoding
2. ldr.w is recognized as menmonic for the long encoding
3. ldr will map to either short or long encodings depending on the size of the offset

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186831 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
cae5d5ea658e05091e66b742b5834f1896ff2f5d 19-Jul-2013 Tilmann Scheller <tilmann.scheller@googlemail.com> ARM: Add instruction aliases for the Thumb2 PLD/PLDW (literal) alternate form.

See A8.8.127 in ARM DDI 0406C.b.

Related to <rdar://problem/14403733>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
898788c6bcc2abfe0e1c7b21c14394352963acd6 16-Jul-2013 Tilmann Scheller <tilmann.scheller@googlemail.com> ARM: Add support for the Thumb2 PLI alternate literal form.

This adds an instruction alias to make the assembler recognize the alternate literal form: pli [PC, #+/-<imm>]

See A8.8.129 in the ARM ARM (DDI 0406C.b).

Fixes <rdar://problem/14403733>.



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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
79c163d6ddeb84ea1743eca0644688951bfc5a97 03-Jul-2013 Tilmann Scheller <tilmann.scheller@googlemail.com> ARM: Prevent ARMAsmParser::shouldOmitCCOutOperand() from misidentifying certain Thumb2 add immediate T3 encodings.

Before the fix Thumb2 instructions of type "add rD, rN, #imm" (T3 encoding, see ARM ARM A8.8.4) with rD and rN both being low registers (r0-r7) were classified as having the T4 encoding.

The T4 encoding doesn't have a cc_out operand so for above instructions the operand gets erroneously removed, corrupting the token stream and leading to parse errors later in the process.

This bug prevented "add r1, r7, #0xcbcbcbcb" from being assembled correctly.

Fixes <rdar://problem/14224440>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185575 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
b81b477cd4392a51112c3af0659ea9fc176e74f1 03-Jul-2013 Mihai Popa <mihail.popa@gmail.com> This corrects the implementation of Thumb ADR instruction. There are three issues:
1. it should accept only 4-byte aligned addresses
2. the maximum offset should be 1020
3. it should be encoded with the offset scaled by two bits


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185528 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e29e2afc738348c74966ed81b3568779247c9fbd 01-Jul-2013 Chad Rosier <mcrosier@apple.com> [ARMAsmParser] Sort the ARM register lists based on the encoding value, not the
tablegen enum values. This should be the last fix due to fallout from r185094.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a744d41a3f8af25938e12617abe2a8d32f6eabf6 28-Jun-2013 Tilmann Scheller <tilmann.scheller@googlemail.com> ARM: Fix pseudo-instructions for SRS (Store Return State).

The mapping between SRS pseudo-instructions and SRS native instructions was incorrect, the correct mapping is:

srsfa -> srsib
srsea -> srsia
srsfd -> srsdb
srsed -> srsda

This fixes <rdar://problem/14214734>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
beb920fce6ccc89b4735f280f94cb8c227f4ef5e 18-Jun-2013 Amaury de la Vieuville <amaury.dlv@gmail.com> ARM: fix literal load with positive offset encoding

When using a positive offset, literal loads where encoded
as if it was negative, because:
- The sign bit was not assigned to an operand
- The addrmode_imm12 operand was not encoding the sign bit correctly

This patch also makes the assembler look at the .w/.n specifier for
loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184182 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1290ce00a372f10fa1667d3566477f86ede04c73 13-Jun-2013 Amaury de la Vieuville <amaury.dlv@gmail.com> ARM: fix t2am_imm8_offset operand printing for imm=#-0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
4e9a96d810eb0cc126ebe6f18e536b474c84940c 10-Jun-2013 Amaury de la Vieuville <amaury.dlv@gmail.com> ARM: ISB cannot be passed the same options as DMB

ISB should only accepts full system sync, other options are reserved

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1ad3a410beff11913db0573942fb51b651d01a13 26-Apr-2013 Quentin Colombet <qcolombet@apple.com> ARM: Fix encoding of hint instruction for Thumb.
"hint" space for Thumb actually overlaps the encoding space of the CPS
instruction. In actuality, hints can be defined as CPS instructions where imod
and M bits are all nil.

Handle decoding of permitted nop-compatible hints (i.e. nop, yield, wfi, wfe,
sev) in DecodeT2CPSInstruction.

This commit adds a proper diagnostic message for Imm0_4 and updates all tests.

Patch by Mihail Popa <Mihail.Popa@arm.com>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180617 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1e8ed2537b3e4b2175cd9e62626f07606c62cfa0 23-Feb-2013 Jim Grosbach <grosbach@apple.com> ARM: Convenience aliases for 'srs*' instructions.

Handle an implied 'sp' operand.

rdar://11466783

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a827a47923700c16256036ca0bda8c0ff6108fdb 15-Dec-2012 Kevin Enderby <enderby@apple.com> Make sure the alternate PC+imm syntax of LDR instruction with a small
immediate generates the narrow version. Needed when doing round-trip
assemble/disassemble testing using the alternate syntax that specifies
'pc' directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
fd652df8b36a9d3e6b09ae2b9f7bcb07e88fdfaa 02-Aug-2012 Jiangning Liu <jiangning.liu@arm.com> Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset index issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
c1b7ca5ba28ded2d83ae534c8e072c2538d43295 02-Aug-2012 Jiangning Liu <jiangning.liu@arm.com> Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1fb27eccf5b7eabde9678d84411eb1df8a693683 02-Aug-2012 Jiangning Liu <jiangning.liu@arm.com> Fix #13241, a bug around shift immediate operand for ARM instruction ADR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
7e99a60857532ca2973cf9dabc790d84a2e15a8a 18-Jun-2012 Jim Grosbach <grosbach@apple.com> ARM: Define generic HINT instruction.

The NOP, WFE, WFI, SEV and YIELD instructions are all hints w/
a different immediate value in bits [7,0]. Define a generic HINT
instruction and refactor NOP, WFI, WFI, SEV and YIELD to be
assembly aliases of that.

rdar://11600518

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158674 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
54319e2a8c22e7ee7044e398fbd8d4287e2b7c4f 01-May-2012 Jim Grosbach <grosbach@apple.com> ARM: Add a few missing add->sub aliases w/ 'w' suffix.

Aliases for adding a negative immediate when using an explicit 'w'
suffix. E.g.,
adds.w r2, #-16
adds.w r2, r2, #-16
addw r2, #-16
addw r2, #-16
addw r2, r2, #-16

rdar://11330769

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a9cc08f24f61e2663a131d7ac16c329b75162e7b 28-Apr-2012 Jim Grosbach <grosbach@apple.com> ARM: Thumb add(sp plus register) asm constraints.

Make sure when parsing the Thumb1 sp+register ADD instruction that
the source and destination operands match. In thumb2, just use the
wide encoding if they don't. In Thumb1, issue a diagnostic.

rdar://11219154

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
04a09a461beb4ec629fe53e601b7665547ac35c3 27-Apr-2012 Richard Barton <richard.barton@arm.com> Fix ARM assembly parsing for upper case condition codes on IT instructions.


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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
cac31de146e7131f411715dc6cb1958ea59bd754 26-Apr-2012 Evan Cheng <evan.cheng@apple.com> Specify cpu to unbreak tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155604 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a23ecc2ba945c9685a76552276e5f6f41859b4ab 10-Apr-2012 Jim Grosbach <grosbach@apple.com> ARM fix cc_out operand handling for t2SUBrr instructions.

We were incorrectly conflating some add variants which don't have a
cc_out operand with the mirroring sub encodings, which do. Part of the
awesome non-orthogonality legacy of thumb1. Similarly, handling of
add/sub of an immediate was sometimes incorrectly removing the cc_out
operand for add/sub register variants.

rdar://11216577

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
b657a90929867716ca1c7c12d442bb5d32281bd4 05-Apr-2012 Jim Grosbach <grosbach@apple.com> ARM assembly parsing for 'msr' plain 'cpsr' operand.

Plain 'cpsr' is an alias for 'cpsr_fc'.

rdar://11153753

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ad353c630359d285018a250d72c80b7022d8e67e 30-Mar-2012 Jim Grosbach <grosbach@apple.com> ARM assembler should prefer non-aliases encoding of cmp.

When an immediate is both a value [t2_]so_imm and a [t2_]so_imm_neg,
we want to use the non-negated form to make sure we prefer the normal
encoding, not the aliased encoding via the negation of, e.g., 'cmp.w'.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
2d30d947ec2626e8b1a9b577cdfa4121f476c3f5 30-Mar-2012 Jim Grosbach <grosbach@apple.com> ARM integrated assembler should encoding choice for add/sub imm.

For 'adds r2, r2, #56' outside of an IT block, the 16-bit encoding T2
can be used for this syntax. Prefer the narrow encoding when possible.

rdar://11156277

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
c0164f86080bc9d7a41fd5eabd0d6556396f5b38 30-Mar-2012 Jim Grosbach <grosbach@apple.com> ARM assembly parsing needs to be paranoid about negative immediates.

Make sure to treat immediates as unsigned when doing relative comparisons.

rdar://11153621

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
213d2e7dc31bef3ceeef0cefa703cb4ce52de51a 16-Mar-2012 Jim Grosbach <grosbach@apple.com> ARM optional operand on MRC/MCR assembly instructions.

rdar://11058464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
0b4c6738868e11ba06047a406f79489cb1db8c5a 18-Jan-2012 Jim Grosbach <grosbach@apple.com> Thumb2 alternate syntax for LDR(literal) and friends.

Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]".

rdar://10250964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148432 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
520dc78d92a47af5e644b09f401d278cb1d5d196 21-Dec-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing of 'mov rd, rn, rrx'.

Maps to the RRX instruction. Missed this case earlier.

rdar://10615373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
2cc5cda464e7c936215281934193658cb799c603 21-Dec-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing of 'mov(register shifted register)' aliases.

These map to the ASR, LSR, LSL, ROR instruction definitions.

rdar://10615373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8d11c6349f9bf276534907245946518042c1bb60 14-Dec-2011 Jim Grosbach <grosbach@apple.com> ARM/Thumb2 'cmp rn, #imm' alias to cmn.

When 'cmp rn #imm' doesn't match due to the immediate not being representable,
but 'cmn rn, #-imm' does match, use the latter in place of the former, as
it's equivalent.

rdar://10552389

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
863d2af9477e331955a9bee8be1969ce658b59b5 13-Dec-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembler aliases for "mov(shifted register)"

rdar://10549767


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146520 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
0da6e867cf10a0bcca56df8d854355025e1d6f91 13-Dec-2011 Jim Grosbach <grosbach@apple.com> Test for 146516

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
55b02f28c1a2960ebb88cf5019cc5b36bb2eabf4 13-Dec-2011 Jim Grosbach <grosbach@apple.com> ARM thumb2 parsing of "rsb rd, rn, #0".

rdar://10549741


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146515 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e91e7bcadc445381adef5c5154e8e2cba074505f 13-Dec-2011 Jim Grosbach <grosbach@apple.com> ARM pre-UAL NEG mnemonic for convenience when porting old code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8524bca75076a5e94ba3263968fa4b9e4fc6234f 07-Dec-2011 Jim Grosbach <grosbach@apple.com> Thumb2 alias for long-form pop and friends.
rdar://10542474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146046 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
cf9814ddd277dfcbb4ec5727e2cb510b8a451e04 06-Dec-2011 Jim Grosbach <grosbach@apple.com> Thumb2: MUL two-operand form encoding operand order fix.

Fix the alias to encode 'mul r5, r6' as if it were 'mul r5, r6, r5' so we
match gas.

rdar://10532439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
df33e0d05e6b7dc3d65cdb96e52fb6fb6b07f876 06-Dec-2011 Jim Grosbach <grosbach@apple.com> Thumb2 encoding choice correction for PLD.

Using encoding T1 for offset of #0 and encoding T2 for #-0.

rdar://10532413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
6e507c645d469f525a46c4280cc29bd3078bb9d0 05-Dec-2011 Jim Grosbach <grosbach@apple.com> Update tests for r145860. Add a few new ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
da84786bee8304588a4325b15e297be1995a5d41 05-Dec-2011 Jim Grosbach <grosbach@apple.com> Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.

rdar://10529348


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
908f923cfc63c9c941dfa77b13a281f4d845e03c 15-Nov-2011 Jim Grosbach <grosbach@apple.com> Testcase for r144684.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1de0bd194540f8bab399fb39c4ba615a7b2381d3 15-Nov-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing for mul.w in IT block fix.

When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.

rdar://10449281

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5402637ff283d7397513d5c1699cdf2274c47313 11-Nov-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing for push/pop w/ hi registers in the reglist.

rdar://10130228.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
3c5d6e4df495316c0d2e0a7bca5ec7a88aa400a5 10-Nov-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing STMDB w/ optional .w suffix.

rdar://10422955


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
89a633708542de5847e807f98f86edfefc9fc019 29-Oct-2011 Jim Grosbach <grosbach@apple.com> Add Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".

When '~imm' is encodable as a t2_so_imm but plain 'imm' is not. For example,
mov r2, #-3
becomes
mvn r2, #2

rdar://10349224


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5d0492cfc4521ccb13b4961227b279991a17c393 28-Oct-2011 Jim Grosbach <grosbach@apple.com> Thumb2 ADD/SUB instructions encoding selection outside IT block.

Outside an IT block, "add r3, #2" should select a 32-bit wide encoding
rather than generating an error indicating the 16-bit encoding is only
legal in an IT block (outside, the 'S' suffic is required for the 16-bit
encoding).

rdar://10348481


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
88484c00307274568ab068909cb38ecaedd41cbf 27-Oct-2011 Jim Grosbach <grosbach@apple.com> Thumb2 t2LDMDB[_UPD] assembly parsing to recognize .w suffix.

rdar://10348844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
036a67d670413f8116415b87457f22d256f314ae 27-Oct-2011 Jim Grosbach <grosbach@apple.com> Thumb2 t2MVNi assembly parsing to recognize ".w" suffix.

rdar://10348584


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143108 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a581328ceb4c9db165d79a4dabd6b28db799d70f 27-Oct-2011 Jim Grosbach <grosbach@apple.com> Thumb2 ldr pc-relative encoding fixes.

We were parsing label references to the i12 encoding, which isn't right.
They need to go to the pci variant instead.

More of rdar://10348687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143068 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
c66e7afcf2810a2c1ebf08514eaf45c478e5ff67 12-Oct-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDC/STC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141811 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
25ddc2bf7ed69f500dd4d3e003004bda28c3dd95 28-Sep-2011 Jim Grosbach <grosbach@apple.com> ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w.

Add inst alias to handle these assembly forms. Add tests, too.

rdar://10178799


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140647 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
256e10f96461f6a06c0ff3fe892981f40626791e 27-Sep-2011 Owen Anderson <resistor@mac.com> Remove incorrect testcases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140572 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
4d2a00147d19b17d382644de0d6a1f0d3230e0e4 24-Sep-2011 Owen Anderson <resistor@mac.com> Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
61268701931d747fa95e0be8a368101e7f97b83c 22-Sep-2011 Owen Anderson <resistor@mac.com> Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ac9c2aa8e1b8ff36934e98287e1733995c5ac20d 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for WFE/WFI/YIELD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140126 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
50f1c37123968b7f57068280483ec78f6ff7973e 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UXTAB/UXTAB16/UXTH/UXTB/UXTB16/UXTH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
400b624e02216dcbe1ec0c17963caa088b33c57a 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for USUB8/USUB16.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
6053cd956fa6c781a4ee05cbc99ab15db3cf3d13 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for USAX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140119 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
653419fff0420a6c9cfc953c135f1e9dc3420a45 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for USAT16.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a7e5b01fe1156050ac9174a421ecf90911e1949c 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for USAT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140117 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ad7d7444563b628dd723015e9c44692d5b67067e 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UQSAD8/USADA8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
73e019eb12bda5a3dd6165b749dfa08b8b30e477 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UQSUB16/UQSUB8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140112 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ab3bf97fe029e3ce6834b54c4c5a647c0b665546 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UQASX/UQSAX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
d7e2785ea8af746abee99aaef074a610d5ed73d8 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UQADD16/UQADD8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
d5d0e81a4bec76a56a1e7b2326ed12bfcbcab9b9 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UMAAL/UMLAL/UMULL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
9546de68aac116cdf6f0af5a2972101acc476e0c 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UHSUB16/UHSUB8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140089 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
6729c48b940df5c141eec6375d14544cdbb2ed3f 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UHASX/UHSAX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140088 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
2c1ef5bac85f3ef002047178490a00c5ea2c7cfc 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UHADD16/UHADD8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140087 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
6451cbf79f75fde6319cd4dbcb8a48aecac702f4 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UBFX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140086 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
4032eaf98c63b0fb1f2418a1cdc56b72bc76c329 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UASX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140085 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
11f23c1a7260a1cb4b4eee20aea09676e15d55c0 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Fix copy/past-o. Gotta remember that 'modify' step...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140082 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
661daa481ef438ea797b01df470d2190c93c9863 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for UADD16/UADD8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140081 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
aa70695ef045a54eb8c4f701f9db03179c816b48 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for TST.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140080 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
7f739bee261debdf56bd89ac922b57eca53e91dc 20-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for TBB/TBH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1494c496e2827f991f75eae4acf8f7bf9952abdd 19-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for TEQ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140070 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
326efe58918d3f0a431d07938054870fcd0e240f 19-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8a8d28b0392a27ff8e0c60c04561671023a08dc2 19-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
9883acd2a6c0851b9095409bcc0541b26165015a 19-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140025 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
7649b0b8c708f95e318296bd6a4b3968cd6bb38c 19-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SUB(register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f67e8554bf4808ad447ffb5d2deebbb10b810391 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SUB(immediate).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139966 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
47313df81c096005dbbe8dbe729375f7d0bb3e15 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STRT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139963 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
18ceae2a705cd4da38a6f67bf0bb9d8615a8b254 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRHT/STRHT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139962 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
4a1d200c2f850dc7b0eda6b8fa89157d21b731c5 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STREX/STREXB/STREXH/STREXD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e45451eea9cd7fc78227fdb94f215ff22e9d0f75 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STRD.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
75d74282759293b5f5abeae5b3f9e0cec42ae52f 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Simplify comment. There's no Thumb LDRD(register) encoding. That's ARM only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139959 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e041af7e0e0b6b59457c3218e6489412793a869c 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STRBT.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
c71ed786c3b7d2e8072483805434e23f77f606c5 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STRH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
59c50760941742870786ca6f497f3dcecfc965e0 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Remove test of undocumented format.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
76ca6d9bcd093ced4277109e6819d49eead0c956 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STRB.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
2e7a94137b742798df9678bff925f17844c1e0ca 17-Sep-2011 Jim Grosbach <grosbach@apple.com> Shuffle a few more thumb2 tests to match the comment headings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5320b40d9e6f9d0cbabcebaa3f224e8ba1fc00cd 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 tests for STR(literal), STR(register) and STR pre/post indexed immediate.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
0bb7c6e8d627edb8c83599c88ad9315636434418 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Shuffle a few tests around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
642caea2c624aaeb492a112d60f419ee4d1a10c7 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STR(immediate).

Add aliases for STRB/STRH while there. Tests forthcoming for those.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
36343d85cd42c5fbeb7556655b9ab48bce8b8fdc 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STMDB.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8213c96655e955a0b63b05580bc2f6a55be26083 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for STMIA.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
3335029b1f4cd663411277aa2f93b4eaa7a0289e 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SSUB16/SSUB8.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
50bd470d85c63860f887b7c3e5724c9fd43ef3a2 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SSAX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
9f4ddb3efa0f76d7c2463648eca9d82403c2e8a3 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SSAT16.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
b105b997a49c809bfd464ae7691d5ee45d34f446 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SSAT.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
05ec8f7ac90179cccb476512c872db95bfec418d 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SRS.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
dea84127840ad38100569d2cc5045c5086ee668d 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMMUSD/SMUSDX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
41ca75bed0e32d4ba4fafd445e6641b34e490046 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMMULWB/SMULWT.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
3443ed525a3bce98bacabb5aa8e67bee6def3b09 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMMULL.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
d727148c21f7294032a07f7e66b4aa06085c7f0b 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMULBB/SMULBT/SMULTB/SMULTT.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
c9592cbad501956c71cd9e7f515f48e2b05b6052 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMMUAD'dib.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f3578a84974e0291582966e4a3aebf3802ab211b 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMMUL/SMMULR.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
cb574bb71edcb816509db434d220e9e1bb51d53d 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMMLS/SMMLSR.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
3b61d23297a8401fb1aadf129fdfa282f175f88d 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMMLA/SMMLAR.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
7ff2472b8235d8702bd04bf297d573d06cf6b40d 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLSLD/SMLSLDX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
920ad2b6810e008ad98ee42b51abf791101aa8df 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLSD/SMLSDX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f566ca741885285d565ad5347baf9663ed7b7d62 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLAWB/SMLAWT.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
231948f860df79b7f0926305caa065a64d758265 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLALD/SMLALDX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
4f2999b2969416aefe9328b73a61f5d64e424a92 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLALBB/SMLALBT/SMLALTB/SMLALTT.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
837fc5e9d5138ed48a74a672dc4c1525e5975ce8 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLAL.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e74711b8b0c7abd0383ebb70941cdcb779918e12 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLAD/SMLADX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
246ae02bce7afb0411d21803eb0ad1b3832189f9 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SMLABB/SMLABT/SMLATB/SMLATT.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f08084ba4bbabd1c22ad654347e77218a16b9a80 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SHSUB16/SHSUB8.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5a6370ff99013ce8a9db12e127770395e81767b4 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SHADD16/SHADD8.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
c075d45364190dfe06eda8aa93b6856d4f55f107 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SHASX/SHSAX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
d16160f18af7735924ad37e69f54308ba037f1e9 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SEV.W.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
56019a32bdfc65b3e97aec3827f4d12b091365bb 16-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SEL.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
7ecedac8b726926cce5758b791c5e78caff8b5ad 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SBFX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
356c759908e1c6b968293d54bc4aa26bc8415407 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Add some missing 'CHECK' lines and tidy up others.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
fd8b8519087d19d3ac4c3a0b23e6f7a6c2ced46b 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SBC.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e4e4a93e9ec6040b6466bf067d5e02533471f093 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SASX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ed15ab1aadea6216b30ccfc659b194d09f44ca14 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for SADD16/SADD8.

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191d33fd6d0a91e89f2a8f719e5adbdccf9effa9 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for RSB.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
aba8015cc375ac7de757d92e55d1aad986de6202 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for RRX.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5260be1f2d8a2efe9aea398248736556cab42eeb 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for ROR.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
689b86ed2e1f1daf9201f0ef83ff3bc1d5167232 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for REV16/REVSH.

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1b69a128d6b98456c666b4031cc46c3d0fbe6177 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for REV.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
4bab3c77102954380c923505c413a2df7aca48eb 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for RBIT.

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3e3a9c796453afed58e27d7bab926061f8dd2d16 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for signed saturating arithmetic insns.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
07d7f3d387739b52f0fccd7c9d7bb54b0195f56c 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Re-order test.

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f18544d1e55f6e8e3929c1bb840d8fb8709064d0 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for PLI.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f83e297cd1c36293d8950106b6d87f0558f21e80 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for PLD.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
0b69247b10ddbce5f0c476c3471918ffc6091ac5 15-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for PKH.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8adf62034a874adacff158e8adc9438cb3e67c01 15-Sep-2011 Owen Anderson <resistor@mac.com> Fix a crasher in Thumb2 MOV-immediate encoding for certain inputs.


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0b3ed6de80734c3ac15e1b1f0b5306a1f61f88ce 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for ORR.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
b72504b4fad51941523b5e6db3edba58a2ebbd90 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for ORN.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5c5eca3534b616fbdb8d2c7c56ab2182f4a9ef05 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for NOP.W.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
d32872f9ca446fc48084082fcb88255a55405cc2 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for MVN.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
64944f48a1164c02c15ca423a53919682a89074c 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for MUL.

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/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
bf841cf3360558d2939c9f1a244a7a7296f846df 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for MSR/MRS.

Fix a bug in handling default flags for both ARM and Thumb encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
97f50f3870fabfc7358543699fe608c59c61c2e6 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for MRC/MRC2/MRRC/MRRC2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139717 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
95be01a56905d15f42ca47b793c1af8a5638c89e 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for MOVT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
c2d3164ab467bdfa8508b93177e69b99626cd8e2 14-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing for MOV in IT block.

Select the right 16 vs. 32 bit encoding in an IT block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
b6b7f515e2b90c9f9b6cdd5b9648121f6ad2b3a1 13-Sep-2011 Owen Anderson <resistor@mac.com> Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
12c7e90d369b4605aac0ddbd252231beacb2aabb 13-Sep-2011 Owen Anderson <resistor@mac.com> Fix encoding of Thumb2 shifted register operands with RRX shifts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
fd92d2e106acfbf13ed29b5d15f3a690cd8699b2 12-Sep-2011 Owen Anderson <resistor@mac.com> Fix encoding of PC-relative LDRSHW with an immediate offset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139537 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1ad60c2adc9ed765a968747d0c548cda53bfd384 10-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for MOV(immediate).

Some aliases for MOV(register) also to keep existing T1 tests happy when
run in thumbv7 mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
08fef885eb39339a47e3be7f0842b1db33683003 10-Sep-2011 Owen Anderson <resistor@mac.com> Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139422 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
51f6a7abf27fc92c3d8904c2334feab8b498e8e9 09-Sep-2011 Owen Anderson <resistor@mac.com> Thumb unconditional branches are allowed in IT blocks, and therefore should have a predicate operand, unlike conditional branches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
468709e43dfff52f48af9ff411d461e22b6e2015 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for MLA and MLS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
84d043a8b38d43a16549ca7e7cc9b275b2fa3aea 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for MCR, MCR2, MCRR, MCRR2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139397 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
95102265a96104512abbf0d8e316a1ef8473b994 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LSL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139395 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
d4b72de3e2c9bd2397f37272c0904c53036e38d4 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139393 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
56806c29973a801a8311b5501c05a0a49651b42f 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRSHT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a315a9909387cdf8ce36077d7aa91844caa2f19d 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRSH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139391 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
578edfbfa072a82ce22790567d3db434710e7551 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRSBT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139390 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
0811fe13d65c67e4c22d9113795deabbd0daa277 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRSB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
95d397c3b1e5001e5b25b04c52c13a19ec379c2f 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139386 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1efd9a0e8b01abf3b3d7048a80c08599f7d3eefd 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Shuffle a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139385 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
b6aed508e310e31dcb080e761ca856127cec0773 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e3a0adf162a849c7dd01514d151651850451db38 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Add FIXME.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a77295db19527503d6b290e4f34f273d0a789365 09-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRD(immediate).

Refactor operand handling for STRD as well. Tests for that forthcoming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139322 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
9ea33b0c03e5c0a66b9d8385e164362b186513b1 08-Sep-2011 Jim Grosbach <grosbach@apple.com> Add tests for Thumb2 LDRB indexed addressing w/ writeback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
e64fb28da191bc978ab99ea397e6108a15c364f8 08-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDR post-indexed.

More cleanup of the general indexed addressing T2 instructions. Still more to
do, especially for stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139272 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
eeec025cf5a2236ee9527a3312496a6ea42100c6 08-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDR pre-indexed w/ writeback.

Adjust encoding of writeback load/store instructions to better reflect the
way the operand types are represented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f0eee6eca8c39b11b6a41d9b04eba8985655df77 08-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRBT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
489c693f65521649dbee0378dbb465029d71c712 08-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRB(register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ab899c1bcca7f1cc85342c3a686464ba4af035df 08-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDR(register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139264 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8bb5a861a0efae6b9c8f07936ad9bb3508ada23e 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDRB(immediate).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139258 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
1aedfb47f96a396e8364ec41c94ee75db84d769e 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for LDR(literal).

Need branch relocation support to distinguish this encoding from the
16-bit Thumb1 encoding w/o the explicit .w suffix. That comes later, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139257 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ed1cb6defa02d92302288410c35464c764adb060 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Add tests for Thumb2 LDR(immediate) from r139254.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
94f914e3fd4b040edd81abb5f455ed2b99e2572a 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for LDMDB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
76ecc3d35b4d16afb016bb14e29e12802b968716 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for LDMIA.

Choose 32-bit vs. 16-bit encoding when there's no .w suffix in post-processing
as match classes are insufficient to handle the context-sensitiveness of
the writeback operand's legality for the 16-bit encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
aa833e53dc74db6cb6789ef7f05c620d28980983 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for ISB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139200 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
8f6d8104fc20550da00c3a4a0bc66de64117826d 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for EOR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139199 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
94d1c489a5f75f6092de413f7891449008ed91fd 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for DSB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139194 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
06c1a51241852bd652ae6473afaa71d96d48b0eb 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for DMB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
77951908b76c00315f1a74d09fb45530029638ec 07-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for DBG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139191 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ef88a926778b15aa4527a148a514ed0585af7cb1 06-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for CMN and CMP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
0b533a3bd39471d6dce5a4495f25323a0bb515e0 06-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for CLZ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139177 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ad2dad930d450d721209531175b0cbfdc8402558 06-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for CLREX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139172 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
79d56a66c3d763b3a8147581c75c184cd48abcdc 06-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for CDP/CDP2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139168 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
83452b206459f56454443b4caffa2e5bf1422def 03-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for CBZ/CBNZ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
6c3e11ea55172def6f9829cc24cc5c3b071208ba 03-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for BXJ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139053 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
cefd2020a671248b3266bc2e818645db98f3a1d9 03-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for BIC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
0b9a3d37c5a6c452b40beede7519be97cad97ef0 03-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for BFI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139051 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
7413f41d3b45d9fe851943d110a5ef5a54a5e076 03-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for BFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139050 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a110988b391652e3f4f85cb709a3eeb81c8cdd84 03-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding of B instruction.

Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5f25fb01b4061725124e34a942809e9c0c6f681c 02-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for ASR.

For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
5c1ac5554229d5481b772cb017139bdd24d5114d 02-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for AND (register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f0851e5d95a1d1f746a3b1e9633af76496e316e7 02-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for ADD (register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
ca52a7e38c0bcdd1a8f32212239606fe1f5e3152 02-Sep-2011 Jim Grosbach <grosbach@apple.com> Tests for Thumb2 AND (immediate) instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139013 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
aca878c5e6d8ed34e436f4a4ec3b4e4dff3616db 02-Sep-2011 Jim Grosbach <grosbach@apple.com> Add FIXME. Thumb2 ADR encoding choice is non-trivial.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
7f17b5a483ea358f2b9e3958f16cf34d75d5b4da 01-Sep-2011 Owen Anderson <resistor@mac.com> t2Bcc is allowed to have a predicate without a preceding IT instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
20ed2e7939d6a8e804a51897c3af4588deb48be2 01-Sep-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding for ADD(immediate).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
72335d55d972dd7279fe68ed05fa3c4e7fce9345 31-Aug-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for ADC(register).

Also add instruction aliases for non-.w versions of SBC since they're the
same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
21df36c57afc588c8073a070a47e3ba45fa87270 31-Aug-2011 Owen Anderson <resistor@mac.com> Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138837 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
a01e12499f0e9dd0c5dec0650e817a009cdd1238 30-Aug-2011 Jim Grosbach <grosbach@apple.com> Thumb2 assembly parsing and encoding support for ADC(immediate).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138778 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s
f8e1e3e729473b8b2b7ee6134b6417976af84d05 30-Aug-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for IT blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/test/MC/ARM/basic-thumb2-instructions.s