| 40c224a573f2b763046001e622aafca90f68c693 |
|
25-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: fix texture barrier insertion to prevent WAW hazards
Fixes, for instance, object highlighting in Diablo 3 (wine).
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 717f55d79d9709a31e0f85a87f076ac13446701d |
|
09-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: fix reversed order of lane ops in quadops
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 38a20281fcc2ed244aea0aaa268035533f48a183 |
|
05-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: fix lowering of textureGrad
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 00fe442253744c4c4e7e68da44d6983da053968b |
|
29-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: implement better placement of texture barriers
Put them before first uses instead of right after the texturing
instruction and cull unnecessary barriers.
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| e44089b2f79aa2dcaacf348911433d1e21235c0c |
|
14-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0: add initial support for nve4+ (Kepler) chipsets
Most things that work on Fermi should work on Kepler too.
There are a few performance optimizations left to do, like better
placement of texture barriers and adding scheduling data to the
shader instructions (without them, a thread group will be masked
for 32 cycles after each single instruction issue).
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| a05e6a3fa28168d58a13cfb07f7a664e84b925ae |
|
14-Apr-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir: Decouple object cloning logic from the sub-object recursion policy.
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 9362d4bc0a03860ec386156cf499e855a9c2d2a5 |
|
09-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: make Instruction::src/def container private
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| af0ce1dba8219ff8628f1fa61cf93c11a77dab94 |
|
12-Jan-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: make use of TGSI_INTERPOLATE_COLOR
Flat SHADE_MODEL still overrides any non-flat interpolation
qualifier, but pulling that state out of the rasterizer cso
isn't really worth the effort, is it ?
NOTE: This is a candidate for the 8.0 branch.
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| e4210a42bcfdb19336faa2ad4b807818c71a2982 |
|
08-Jan-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: TXF array index already is an integer
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 405bd00f3c98cb78d1dda1f3bf5d74155b18cd57 |
|
06-Jan-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: fix default insertion position in pre-SSA lowering pass
Always set position to insert before the current instruction,
the previous behaviour led to confusion (bug in checkPredicate
for BBs with only a single conditional branch).
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 52c8c52b222e1fdb4c1f4ca3dedde9cd7b9c321f |
|
17-Oct-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: use RDSV to fetch FrontFacing before lowering
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 9c930639d9f6d713ccfd16b390a41a9f584f348c |
|
11-Oct-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: fix textureGrad with offsets and in non-FPs
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 37a08ddce54d28f90dc8db8e10792d0759938590 |
|
14-Oct-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: fix argument count for CUBE_ARRAY texture target
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 2ec5c8feb331af29548e98b0e78e810bbbc7009e |
|
17-Oct-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: GP emit address must end up in $r0
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 30cb66cd745fc793a2349f1d17046c50cd51c558 |
|
14-Oct-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: TXQ requires different lowering from normal TEX
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| b5f2c0505fd4f66422e034b041cdf0bc3dc46e99 |
|
23-Sep-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: fix lowering of DIV F32
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 3fc2818f2b9e8a19e5349442e50dcee4858452c6 |
|
12-Oct-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: fix xy confusion typo in readTessCoord
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| d2d19ea51fa3575a8d014a69a9b835c335728817 |
|
14-Sep-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: add missing license headers
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|
| 57594065c30feec9376be9b2132659f7d87362ee |
|
14-Sep-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: import new shader backend code
/external/mesa3d/src/gallium/drivers/nvc0/codegen/nv50_ir_lowering_nvc0.cpp
|