| 7688714916905f29362071ce2eb9e296ca469838 |
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15-Sep-2014 |
Yong Chen <yong.a.chen@intel.com> |
Fix two bugs in cpu_ref
- Make correct parameters for x86 IntrinsicConvolve5x5
- Use correct intrinsic ID for loopFilter
Change-Id: I5180b9e2a80a6e023299963b19bf8b4dcd4ebd4b
Signed-off-by: Yong Chen <yong.a.chen@intel.com>
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| de52a834dbcb2a3196948e7b9f67d395493ea9a4 |
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21-Aug-2014 |
Jason Sams <jsams@google.com> |
Fix two intrinsic clipping bugs.
bug 17157250
Change-Id: I65c945da6bd90733333a5472c1a85b5d3e3e4d6b
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| 074424a4ac5b093331df2c92e7a5bcbfff136b71 |
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22-May-2014 |
Jason Sams <jsams@google.com> |
Enable ARM64 intrinsics.
This also moves ARM intrinsic ifdefs behing ARCH_ARM_USE_INTRINSICS instead of ARCH_ARM_HAVE_VFP.
Change-Id: I48d3d55c77feb931e22288828247e281db43d32b
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| 7b7060c61e4182b29186849c5a857ea5f0898e56 |
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21-Apr-2014 |
Rose, James <james.rose@intel.com> |
Improve RS intrinsics performance.
Renderscript CPU performance for intrinsics cases is not good for x86 platforms.
In many cases it is significantly slower even with SIMD Intrinsics. In current x86 implementation
it is using full 32 bit multiplies which aren't well supported on current Atom platforms.
This patch uses 16 bit multiply with 32 bit add pmaddwd instruction where appropriate.
It also adds atom specificoptimizations to improve RS intrinsics performance.
Change-Id: Ifc01b5a6d6f7430d2dc218f1618b9df3fb7937fe
Signed-off-by: Xiaofei Wan <xiaofei.wan@intel.com>
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| 5cb36d9b36617f6b0493602ef61d620dc8f7e0ae |
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09-Aug-2013 |
Jason Sams <jsams@google.com> |
Merge commit 'b10a68c3' into manualmerge
Conflicts:
cpu_ref/rsCpuIntrinsicColorMatrix.cpp
Change-Id: Ibc2f1514f8858d99f08380f698bc9ae533c69212
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| f5ef8df639ba6363aa5d546e57ce872d04144cb6 |
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06-Aug-2013 |
Jason Sams <jsams@google.com> |
Neon detection for RS SDK compat lib.
Change-Id: I3887158c7ec97ba116c28dc7b1d0c789b81fae60
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| 34b0d3119567b992f0f876a2dffc0161bdcef3e6 |
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27-Jun-2013 |
Jason Sams <jsams@google.com> |
Implement all formats for convolve 5x5.
Change-Id: I93456429e909beffa2b76bc3f7f46bd306c5941d
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| 0b575de8ed0b628d84d256f5846500b0385979bd |
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15-Mar-2013 |
Tim Murray <timmurray@google.com> |
Add x86 server support.
Change-Id: I674acaf15b67afa48bc736f72942a11e2e38e940
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| ce0351debba8dadd1a7af2b3e926de6d787b49af |
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26-Jan-2013 |
Jason Sams <jsams@google.com> |
Fix intrinsic bugs.
Change-Id: I027e5dcd8e538e52a21941facc5b93db2a6eac8c
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| c905efd76fdcc1b8846b229bf7d991d185a7b4b7 |
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27-Nov-2012 |
Jason Sams <jsams@google.com> |
Cleanup pass + implement blur uchar
Change-Id: Ib7f1c5218663b468a3c11daa2c3373ae132145ac
Conflicts:
cpu_ref/rsCpuIntrinsicBlend.cpp
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
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| 709a0978ae141198018ca9769f8d96292a8928e6 |
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16-Nov-2012 |
Jason Sams <jsams@google.com> |
Separate CPU driver impl from reference driver.
Change-Id: Ifb484edda665959b81d7b1f890d108bfa20a535d
/frameworks/rs/cpu_ref/rsCpuIntrinsicConvolve5x5.cpp
|