Searched defs:CC1 (Results 1 - 2 of 2) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 2593 SDValue LL, LR, RL, RR, CC0, CC1; local 2761 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){ 2763 ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get(); 3231 SDValue LL, LR, RL, RR, CC0, CC1; local 3357 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){ 3359 ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get();
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 2938 AArch64CC::CondCode CC1, CC2; local 2939 changeFPCCToAArch64CC(CC, CC1, CC2); 2940 SDValue CC1Val = DAG.getConstant(CC1, MVT::i32); 3118 AArch64CC::CondCode CC1, CC2; local 3119 changeFPCCToAArch64CC(CC, CC1, CC2); 3121 changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, false), CC1, CC2); local 3122 SDValue CC1Val = DAG.getConstant(CC1, MVT::i32); 3135 SDValue CC1Val = DAG.getConstant(CC1, MVT::i32); 3371 AArch64CC::CondCode CC1, CC2; local 3372 changeFPCCToAArch64CC(CC, CC1, CC 5934 AArch64CC::CondCode CC1, CC2; local [all...] |
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