/external/apache-xml/src/main/java/org/apache/xpath/operations/ |
H A D | Neg.java | 19 * $Id: Neg.java 468655 2006-10-28 07:12:06Z minchau $ 30 public class Neg extends UnaryOperation class in inherits:UnaryOperation
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 155 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), local 158 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Neg, Op.getOperand(1));
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/external/chromium_org/third_party/skia/src/core/ |
H A D | SkFloat.cpp | 116 int32_t SkFloat::Neg(int32_t packed) function in class:SkFloat
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/external/llvm/lib/Option/ |
H A D | ArgList.cpp | 194 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier Neg, bool Default) const { argument 195 if (Arg *A = getLastArg(Pos, Neg)) 200 bool ArgList::hasFlag(OptSpecifier Pos, OptSpecifier PosAlias, OptSpecifier Neg, argument 202 if (Arg *A = getLastArg(Pos, PosAlias, Neg))
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 155 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), local 158 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Neg, Op.getOperand(1));
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/external/skia/src/core/ |
H A D | SkFloat.cpp | 116 int32_t SkFloat::Neg(int32_t packed) function in class:SkFloat
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/external/chromium_org/third_party/jinja2/ |
H A D | nodes.py | 786 class Neg(UnaryExpr): class in inherits:UnaryExpr
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineMulDivRem.cpp | 230 Value *Neg = dyn_castNegVal(Op1C); local 232 (BO->getOperand(1) == Op1C || BO->getOperand(1) == Neg) && 563 Value *Neg = Builder->CreateFNeg(T); local 564 Neg->takeName(&I); 565 return ReplaceInstUsesWith(I, Neg);
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H A D | InstCombineCompares.cpp | 1662 Value *Neg = Builder->CreateNeg(BOp1); local 1663 Neg->takeName(BO); 1664 return new ICmpInst(ICI.getPredicate(), BOp0, Neg);
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/external/llvm/lib/Transforms/Scalar/ |
H A D | Reassociate.cpp | 319 static BinaryOperator *LowerNegateToMultiply(Instruction *Neg) { argument 320 Constant *Cst = Constant::getAllOnesValue(Neg->getType()); 323 BinaryOperator::CreateMul(Neg->getOperand(1), Cst, "",Neg); 324 Neg->setOperand(1, Constant::getNullValue(Neg->getType())); // Drop use of op. 325 Res->takeName(Neg); 326 Neg->replaceAllUsesWith(Res); 327 Res->setDebugLoc(Neg->getDebugLoc());
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/external/vixl/src/a64/ |
H A D | macro-assembler-a64.cc | 582 void MacroAssembler::Neg(const Register& rd, function in class:vixl::MacroAssembler
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/external/chromium_org/v8/src/arm64/ |
H A D | macro-assembler-arm64-inl.h | 209 void MacroAssembler::Neg(const Register& rd, function in class:v8::internal::MacroAssembler
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/external/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 2053 FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src, SDValue &Neg, argument 2061 if (!Neg.getNode()) 2064 Neg = DAG.getTargetConstant(1, MVT::i32); 2226 SDValue &Neg = Ops[NegIdx[i] - 1]; local 2233 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, FakeOp, DAG)) 2280 SDValue &Neg = Ops[NegIdx[i] - 1]; local 2292 if (FoldOperand(Node, i, Src, Neg, Abs, Sel, Imm, DAG))
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H A D | AMDGPUISelLowering.cpp | 925 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), local 928 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Neg, Op.getOperand(1));
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/external/llvm/lib/Transforms/Utils/ |
H A D | SimplifyLibCalls.cpp | 1556 Value *Neg = B.CreateNeg(Op, "neg"); variable 1557 return B.CreateSelect(Pos, Op, Neg);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1186 SDValue Neg = CurDAG->getNode(ISD::SUB, dl, N.getValueType(), Zero, RHS); local 1187 AM.IndexReg = Neg; 1192 InsertDAGNode(*CurDAG, N, Neg);
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/external/clang/lib/Analysis/ |
H A D | ThreadSafety.cpp | 1432 Expr *BrE, bool Neg); 1633 Expr *BrE, bool Neg) { 1642 if (Neg) 1629 getMutexIDs(MutexIDList &Mtxs, AttrType *Attr, Expr *Exp, const NamedDecl *D, const CFGBlock *PredBlock, const CFGBlock *CurrBlock, Expr *BrE, bool Neg) argument
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1711 // Return true if Pos is CmpOp and Neg is the negative of CmpOp, 1712 // allowing Pos and Neg to be wider than CmpOp. 1713 static bool isAbsolute(SDValue CmpOp, SDValue Pos, SDValue Neg) { argument 1714 return (Neg.getOpcode() == ISD::SUB && 1715 Neg.getOperand(0).getOpcode() == ISD::Constant && 1716 cast<ConstantSDNode>(Neg.getOperand(0))->getZExtValue() == 0 && 1717 Neg.getOperand(1) == Pos &&
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/external/chromium_org/v8/src/mips/ |
H A D | macro-assembler-mips.cc | 794 void MacroAssembler::Neg(Register rs, const Operand& rt) { function in class:v8::internal::MacroAssembler
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 311 SDNode *MatchRotatePosNeg(SDValue Shifted, SDValue Pos, SDValue Neg, 3460 // Return true if we can prove that, whenever Neg and Pos are both in the 3461 // range [0, OpSize), Neg == (Pos == 0 ? 0 : OpSize - Pos). This means that 3464 // (or (shift1 X, Neg), (shift2 X, Pos)) 3467 // in direction shift1 by Neg. The range [0, OpSize) means that we only need 3469 static bool matchRotateSub(SDValue Pos, SDValue Neg, unsigned OpSize) { argument 3473 // (b) Neg == Neg & (OpSize - 1) whenever Neg is in [0, OpSize). 3475 // So if OpSize is a power of 2 and Neg i 3567 MatchRotatePosNeg(SDValue Shifted, SDValue Pos, SDValue Neg, SDValue InnerPos, SDValue InnerNeg, unsigned PosOpcode, unsigned NegOpcode, SDLoc DL) argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 6335 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), local 6341 return DAG.getNode(AArch64ISD::CSEL, DL, VT, N0.getOperand(0), Neg,
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