/external/clang/lib/Lex/ |
H A D | PPExpressions.cpp | 600 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); local 602 Overflow = ShAmt >= LHS.Val.getBitWidth(); 604 ShAmt = LHS.Val.getBitWidth()-1; 605 Res = LHS.Val << ShAmt; 607 Res = llvm::APSInt(LHS.Val.sshl_ov(ShAmt, Overflow), false); 613 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); local 614 if (ShAmt >= LHS.getBitWidth()) 615 Overflow = true, ShAmt = LHS.getBitWidth()-1; 616 Res = LHS.Val >> ShAmt;
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineShifts.cpp | 373 Constant *ShAmt = ConstantExpr::getZExt(COp1, TrOp->getType()); local 375 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName()); 701 unsigned ShAmt = Op1C->getZExtValue(); local 706 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) { 713 ComputeNumSignBits(I.getOperand(0)) > ShAmt) { 743 unsigned ShAmt = Op1C->getZExtValue(); local 753 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { 763 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ 786 unsigned ShAmt = Op1C->getZExtValue(); local 807 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ [all...] |
H A D | InstCombineMulDivRem.cpp | 989 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), local 991 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName());
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H A D | InstCombineAddSub.cpp | 1072 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); local 1073 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); 1074 return BinaryOperator::CreateAShr(NewShl, ShAmt);
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H A D | InstCombineAndOrXor.cpp | 1414 unsigned ShAmt = local 1417 if ((ShAmt & 7) || (ShAmt > 8*ByteValues.size())) 1420 unsigned ByteShift = ShAmt >> 3;
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H A D | InstCombineCasts.cpp | 1079 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); 1080 return BinaryOperator::CreateAShr(Builder->CreateShl(Res, ShAmt, "sext"), 1081 ShAmt); 1092 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); local 1093 Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext"); 1094 return BinaryOperator::CreateAShr(Res, ShAmt); 1121 unsigned ShAmt = CA->getZExtValue()+SrcDstSize-MidSize; local 1122 Constant *ShAmtV = ConstantInt::get(CI.getType(), ShAmt); 1758 ConstantInt *ShAmt = nullptr; local 1760 m_ConstantInt(ShAmt)))) [all...] |
H A D | InstCombineCompares.cpp | 962 ConstantInt *ShAmt) { 969 uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); 1190 ConstantInt *ShAmt; local 1191 ShAmt = Shift ? dyn_cast<ConstantInt>(Shift->getOperand(1)) : nullptr; 1196 if (ShAmt) { 1221 cast<ConstantInt>(ConstantExpr::getShl(AndCst, ShAmt)); 1223 cast<ConstantInt>(ConstantExpr::getShl(RHS, ShAmt)); 1233 NewCst = ConstantExpr::getLShr(RHS, ShAmt); 1235 NewCst = ConstantExpr::getShl(RHS, ShAmt); 1239 if (ConstantExpr::get(ShiftOpcode, NewCst, ShAmt) ! 961 FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, ConstantInt *ShAmt) argument 1359 ConstantInt *ShAmt = dyn_cast<ConstantInt>(LHSI->getOperand(1)); local 3239 unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits); local 3252 uint64_t ShAmt = 0; local 3265 MaskV <<= ShAmt; local 3268 CmpV <<= ShAmt; local [all...] |
/external/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 1158 const APInt *ShAmt; local 1159 if (match(U->getOperand(1), m_APInt(ShAmt))) { 1160 Tmp += ShAmt->getZExtValue(); 1166 const APInt *ShAmt; local 1167 if (match(U->getOperand(1), m_APInt(ShAmt))) { 1170 Tmp2 = ShAmt->getZExtValue();
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 515 SDValue Lo, Hi, ShAmt; local 518 ShAmt = DAG.getConstant(BitOffset, TLI.getShiftAmountTy(WideVT)); 519 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt); 528 ShAmt = DAG.getConstant(SrcEltBits - Offset, 530 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); 547 ShAmt = DAG.getConstant(WideBits - SrcEltBits, 549 Lo = DAG.getNode(ISD::SHL, dl, WideVT, Lo, ShAmt); 550 Lo = DAG.getNode(ISD::SRA, dl, WideVT, Lo, ShAmt);
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H A D | TargetLowering.cpp | 604 unsigned ShAmt = SA->getZExtValue(); local 608 if (ShAmt >= BitWidth) 611 // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a 616 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { 619 int Diff = ShAmt-C1; 633 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), 643 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && 646 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) 650 TLO.DAG.getConstant(ShAmt, ShT 692 unsigned ShAmt = SA->getZExtValue(); local 745 unsigned ShAmt = SA->getZExtValue(); local 797 unsigned ShAmt = ExVT.getScalarType().getSizeInBits(); local 980 ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1)); local 1045 SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType()); local 1242 const APInt &ShAmt local 2624 unsigned ShAmt = d.countTrailingZeros(); local [all...] |
H A D | SelectionDAG.cpp | 2051 unsigned ShAmt = SA->getZExtValue(); local 2054 if (ShAmt >= BitWidth) 2058 KnownZero <<= ShAmt; local 2059 KnownOne <<= ShAmt; local 2061 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 2067 unsigned ShAmt = SA->getZExtValue(); local 2070 if (ShAmt >= BitWidth) 2074 KnownZero = KnownZero.lshr(ShAmt); 2075 KnownOne = KnownOne.lshr(ShAmt); 2077 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 2083 unsigned ShAmt = SA->getZExtValue(); local [all...] |
H A D | DAGCombiner.cpp | 3218 SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT)); local 3220 return DAG.getNode(ISD::ROTL, SDLoc(N), VT, BSwap, ShAmt); 3222 return DAG.getNode(ISD::ROTR, SDLoc(N), VT, BSwap, ShAmt); 3224 DAG.getNode(ISD::SHL, SDLoc(N), VT, BSwap, ShAmt), 3225 DAG.getNode(ISD::SRL, SDLoc(N), VT, BSwap, ShAmt)); 4329 uint64_t ShAmt = N1C->getZExtValue() + 64 - BitSize; local 4331 DAG.getConstant(~0ULL >> ShAmt, VT)); 4384 unsigned ShAmt = UnknownBits.countTrailingZeros(); local 4387 if (ShAmt) { 4389 DAG.getConstant(ShAmt, getShiftAmountT 4828 unsigned ShAmt = VTBits - EVTBits; local 5439 SDValue ShAmt = N0.getOperand(1); local 5701 unsigned ShAmt = 0; local 5936 unsigned ShAmt = VTBits - EVTBits; local 8802 unsigned ShAmt = Imm.countTrailingZeros(); local [all...] |
/external/llvm/lib/IR/ |
H A D | ConstantFold.cpp | 256 unsigned ShAmt = Amt->getZExtValue(); local 258 if ((ShAmt & 7) != 0) 260 ShAmt >>= 3; 263 if (ByteStart >= CSize-ShAmt) 267 if (ByteStart+ByteSize+ShAmt <= CSize) 268 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize); 278 unsigned ShAmt = Amt->getZExtValue(); local 280 if ((ShAmt & 7) != 0) 282 ShAmt >>= 3; 285 if (ByteStart+ByteSize <= ShAmt) [all...] |
/external/llvm/lib/Transforms/Scalar/ |
H A D | ScalarReplAggregates.cpp | 839 int ShAmt = 0; local 844 ShAmt = DL.getTypeStoreSizeInBits(NTy) - 847 ShAmt = Offset; 853 if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) 855 ConstantInt::get(FromVal->getType(), ShAmt)); 856 else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) 858 ConstantInt::get(FromVal->getType(), -ShAmt)); 988 int ShAmt local 1004 Mask <<= ShAmt; local [all...] |
H A D | SROA.cpp | 1858 uint64_t ShAmt = 8*Offset; local 1860 ShAmt = 8*(DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); 1861 if (ShAmt) { 1862 V = IRB.CreateLShr(V, ShAmt, Name + ".shift"); 1887 uint64_t ShAmt = 8*Offset; local 1889 ShAmt = 8*(DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); 1890 if (ShAmt) { 1891 V = IRB.CreateShl(V, ShAmt, Name + ".shift"); 1895 if (ShAmt || Ty->getBitWidth() < IntTy->getBitWidth()) { 1896 APInt Mask = ~Ty->getMask().zext(IntTy->getBitWidth()).shl(ShAmt); [all...] |
/external/llvm/include/llvm/IR/ |
H A D | IRBuilder.h | 1481 uint64_t ShAmt = 8 * Offset; local 1484 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) - 1486 if (ShAmt) { 1487 V = CreateLShr(V, ShAmt, Name + ".shift");
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 95 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt); 457 unsigned ShAmt) { 464 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); 584 unsigned ShAmt = Log2_32(RHSC); local 586 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, 612 unsigned ShAmt = 0; local 622 ShAmt = Sh->getZExtValue(); 623 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) 626 ShAmt 455 isShifterOpProfitable(const SDValue &Shift, ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt) argument 683 unsigned ShAmt = Log2_32(RHSC); local 752 unsigned ShAmt = 0; local 817 unsigned ShAmt = 0; local 1374 unsigned ShAmt = 0; local [all...] |
H A D | ARMBaseInstrInfo.cpp | 3339 unsigned ShAmt = DefMI->getOperand(3).getImm(); local 3340 if (ShAmt == 0 || ShAmt == 2) 3370 unsigned ShAmt = DefMI->getOperand(3).getImm(); local 3371 if (ShAmt == 0 || ShAmt == 1 || ShAmt == 2 || ShAmt == 3) 3642 unsigned ShAmt = local 3644 if (ShAmt [all...] |
H A D | ARMISelLowering.cpp | 4010 SDValue ShAmt = Op.getOperand(2); local 4017 DAG.getConstant(VTBits, MVT::i32), ShAmt); 4018 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); 4019 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 4028 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 4046 SDValue ShAmt = Op.getOperand(2); local 4051 DAG.getConstant(VTBits, MVT::i32), ShAmt); 4053 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 4055 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); 4062 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); 8341 SDValue ShAmt = N00.getOperand(1); local [all...] |
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1291 SDValue ShAmt = Op.getOperand(2); local 1301 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 1303 ShAmt); 1319 DAG.getConstant(VTBits, MVT::i32), ShAmt); 1320 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); 1321 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 1327 SDValue Cmp = DAG.getSetCC(dl, MVT::i1, ShAmt, 1329 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 1352 SDValue ShAmt = Op.getOperand(2); local 1362 ShAmt); [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 1853 inline static bool isTruncatedShiftCountForLEA(unsigned ShAmt) { argument 1859 return ShAmt < 4 && ShAmt > 0; 1977 unsigned ShAmt = MI->getOperand(2).getImm(); local 1978 MIB.addReg(0).addImm(1 << ShAmt) 2111 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local 2112 if (!isTruncatedShiftCountForLEA(ShAmt)) return nullptr; 2122 .addReg(0).addImm(1 << ShAmt).addOperand(Src).addImm(0).addReg(0); 2127 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local 2128 if (!isTruncatedShiftCountForLEA(ShAmt)) retur 2153 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local 3483 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local [all...] |
H A D | X86ISelLowering.cpp | 4600 unsigned ShAmt = (i << Shift) % 8; local 4601 Mask |= Elt << ShAmt; 5315 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { 5342 ShAmt = NumZeros; 5350 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { 5377 ShAmt = NumZeros; 5385 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { 5391 if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) || 5392 isVectorShiftRight(SVOp, DAG, isLeft, ShVal, ShAmt)) 9352 unsigned ShAmt 5314 isVectorShiftRight(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument 5349 isVectorShiftLeft(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument 5384 isVectorShift(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1777 SDValue ShAmt = DAG.getConstant(VT.getSizeInBits() - 1, MVT::i32); local 1778 SDValue Shl = DAG.getNode(ISD::SHL, DL, VT, Result, ShAmt); 1779 return DAG.getNode(ISD::SRA, DL, VT, Shl, ShAmt);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 3701 SDValue ShAmt = Op.getOperand(2); local 3708 DAG.getConstant(VTBits, MVT::i64), ShAmt); 3709 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); 3710 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, 3725 SDValue FalseValHi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 3747 SDValue ShAmt = Op.getOperand(2); local 3752 DAG.getConstant(VTBits, MVT::i64), ShAmt); 3754 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, 3756 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); 3770 SDValue FalseValLo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); [all...] |