/art/ |
H A D | Android.mk | 34 ifneq (,$(filter clean-oat-target,$(MAKECMDGOALS))) 39 clean-oat: clean-oat-host clean-oat-target 78 .PHONY: clean-oat-target 79 clean-oat-target: 130 # All the dependencies that must be built ahead of sync-ing them onto the target device. 137 # Sync test files to the target, depends upon all things that must be pushed to the target. 138 .PHONY: test-art-target-sync 139 test-art-target-sync: $(TEST_ART_TARGET_SYNC_DEPS) 148 test-art: test-art-host test-art-target [all...] |
/art/build/ |
H A D | Android.cpplint.mk | 37 define declare-art-cpplint-target 49 $(foreach file, $(ART_CPPLINT_SRC), $(eval $(call declare-art-cpplint-target,$(file)))) 50 #$(info $(call declare-art-cpplint-target,$(firstword $(ART_CPPLINT_SRC))))
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H A D | Android.oat.mk | 19 # (that is, non-Android frameworks) testing on the host and target 51 define create-core-oat-target-rules 53 @echo "target dex2oat: $$@ ($$?)" 67 endef # create-core-oat-target-rules 70 $(eval $(call create-core-oat-target-rules,2ND_)) 72 $(eval $(call create-core-oat-target-rules,)) 85 # If we aren't building the host toolchain, skip building the target core.art.
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H A D | Android.common_build.mk | 124 # Clang on the target. Target builds use GCC by default. 132 define set-target-local-clang-vars 270 # Enable target GCC 4.6 with: export TARGET_GCC_VERSION_EXP=4.6 271 $(info Using target GCC $(TARGET_GCC_VERSION) disables thread-safety checks.) 292 # TODO: move -fkeep-inline-functions to art_debug_cflags when target gcc > 4.4 (and -lsupc++) 306 define set-target-local-cflags-vars
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H A D | Android.gtest.mk | 234 # Define a make rule for a target device gtest. 237 define define-art-gtest-rule-target 238 gtest_rule := test-art-target-gtest-$(1)$$($(2)ART_PHONY_TEST_TARGET_SUFFIX) 240 # Add the test dependencies to test-art-target-sync, which will be a prerequisite for the test 249 $$(gtest_rule): test-art-target-sync 266 endef # define-art-gtest-rule-target 305 # Define the rules to build and run host and target gtests. 306 # $(1): target or host 311 ifneq ($(1),target) 313 $$(error expected target o [all...] |
/art/compiler/sea_ir/code_gen/ |
H A D | code_gen_data.cc | 35 // Lookup the LLVM target 43 const ::llvm::Target* target = local 46 CHECK(target != NULL) << errmsg; 58 target->createTargetMachine(target_triple, target_cpu, target_attr, target_options, 62 CHECK(target_machine.get() != NULL) << "Failed to create target machine"; 64 // Add target data 91 // Ask the target to add backend passes as necessary. 96 LOG(FATAL) << "Unable to generate ELF for this target";
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/art/compiler/dex/quick/mips/ |
H A D | fp_mips.cc | 171 QuickEntrypointEnum target; local 175 target = kQuickCmplFloat; 179 target = kQuickCmpgFloat; 183 target = kQuickCmplDouble; 186 target = kQuickCmpgDouble; 190 target = kQuickCmplFloat; 203 RegStorage r_tgt = LoadHelper(target);
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H A D | assemble_mips.cc | 62 * t -> pc-relative target 63 * T -> pc-region target 64 * u -> 1st half of bl[x] target 65 * v -> 2nd half ob bl[x] target 430 * beq rs,rt,target 436 * lui rAT, ((target-anchor) >> 16) 438 * ori rAT, rAT, ((target-anchor) & 0xffff) 445 * b target 450 * lui rAT, ((target-anchor) >> 16) 452 * ori rAT, rAT, ((target 582 CodeOffset target = target_lir->offset; local 596 CodeOffset target = target_lir->offset; local 610 CodeOffset target = target_lir->offset; local 623 CodeOffset target = lir->operands[0]; local 632 CodeOffset target = start_addr + target_lir->offset; local 636 CodeOffset target = start_addr + target_lir->offset; local [all...] |
H A D | call_mips.cc | 39 * target offsets stored in the table. We'll use a special pseudo-instruction 125 exit_branch->target = exit_label; 208 /* branch_over target here */ 209 LIR* target = NewLIR0(kPseudoTargetLabel); local 210 branch_over->target = target; 283 LIR* target = NewLIR0(kPseudoTargetLabel); local 284 branch_over->target = target;
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H A D | utility_mips.cc | 72 * grab from the per-translation literal pool. If target is 110 LIR* MipsMir2Lir::OpUnconditionalBranch(LIR* target) { argument 112 res->target = target; 559 // TODO: base this on target. 667 // TODO: base this on target. 688 LIR* MipsMir2Lir::OpCondBranch(ConditionCode cc, LIR* target) { argument
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/art/compiler/dex/quick/arm/ |
H A D | fp_arm.cc | 216 LIR* target = &block_label_list_[bb->taken]; local 261 OpCondBranch(ccode, target);
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H A D | assemble_arm.cc | 60 * t -> pc-relative target 61 * u -> 1st half of bl[x] target 62 * v -> 2nd half ob bl[x] target 1259 LIR *lir_target = lir->target; 1261 CodeOffset target = lir_target->offset + local 1263 int32_t delta = target - pc; 1294 base_reg, 0, 0, 0, 0, lir->target); 1339 LIR *target_lir = lir->target; 1341 CodeOffset target = target_lir->offset + local 1343 int32_t delta = target 1412 CodeOffset target = target_lir->offset + local 1429 CodeOffset target = target_lir->offset + local 1446 CodeOffset target = target_lir->offset + local 1475 CodeOffset target = lir->operands[1]; local 1492 CodeOffset target = lir->operands[1]; local 1503 LIR* target = lir->target; local 1558 LIR* target = lir->target; local 1568 LIR* target = lir->target; local [all...] |
H A D | call_arm.cc | 77 // Establish loop branch target 78 LIR* target = NewLIR0(kPseudoTargetLabel); local 90 OpCondBranch(kCondNe, target); 135 /* branch_over target here */ 136 LIR* target = NewLIR0(kPseudoTargetLabel); local 137 branch_over->target = target; 206 not_unlocked_branch->target = slow_path_target; 208 null_check_branch->target = slow_path_target; 218 lock_success_branch->target 334 LIR* target = NewLIR0(kPseudoTargetLabel); local [all...] |
H A D | target_arm.cc | 89 // Return a target-dependent special register. 452 lir->target); 457 uintptr_t target = local 461 snprintf(tbuf, arraysize(tbuf), "%p", reinterpret_cast<void *>(target));
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H A D | utility_arm.cc | 75 // TODO: we need better info about the target CPU. a vector exclusive or 207 LIR* ArmMir2Lir::OpUnconditionalBranch(LIR* target) { argument 209 res->target = target; 213 LIR* ArmMir2Lir::OpCondBranch(ConditionCode cc, LIR* target) { argument 219 branch->target = target; 648 // TODO: we need better info about the target CPU. a vector exclusive or 967 // TODO: base this on target. 1126 // TODO: base this on target [all...] |
/art/compiler/llvm/ |
H A D | llvm_compilation_unit.cc | 198 // Lookup the LLVM target 206 const ::llvm::Target* target = local 209 CHECK(target != NULL) << errmsg; 220 target->createTargetMachine(target_triple, target_cpu, target_attr, target_options, 224 CHECK(target_machine.get() != NULL) << "Failed to create target machine"; 226 // Add target data 287 // Ask the target to add backend passes as necessary. 292 LOG(FATAL) << "Unable to generate ELF for this target";
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/art/disassembler/ |
H A D | disassembler_mips.cc | 230 uint32_t target = (instr_index << 2); local 231 target |= (reinterpret_cast<uintptr_t>(instr_ptr + 4) & 0xf0000000); 232 args << reinterpret_cast<void*>(target);
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/art/compiler/dex/quick/arm64/ |
H A D | assemble_arm64.cc | 82 * t -> pc-relative target 858 LIR *target_lir = lir->target; 861 CodeOffset target = target_lir->offset + local 863 int32_t delta = target - pc; 873 LIR *target_lir = lir->target; 876 CodeOffset target = target_lir->offset + local 878 int32_t delta = target - pc; 886 LIR* target_lir = lir->target;
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H A D | fp_arm64.cc | 203 LIR* target = &block_label_list_[bb->taken]; local 247 OpCondBranch(ccode, target);
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H A D | call_arm64.cc | 94 branch_out->target = loop_exit; 144 // branch_over target here 145 LIR* target = NewLIR0(kPseudoTargetLabel); local 146 branch_over->target = target; 216 not_unlocked_branch->target = slow_path_target; 218 null_check_branch->target = slow_path_target; 228 lock_success_branch->target = success_target; 264 slow_unlock_branch->target = slow_path_target; 266 null_check_branch->target 299 LIR* target = NewLIR0(kPseudoTargetLabel); local [all...] |
/art/compiler/dex/quick/ |
H A D | mir_to_lir-inl.h | 45 int op1, int op2, int op3, int op4, LIR* target) { 54 insn->target = target; 175 // Note: target-specific setup may specialize the fixup kind. 251 // Handle target-specific actions 44 RawLIR(DexOffset dalvik_offset, int opcode, int op0, int op1, int op2, int op3, int op4, LIR* target) argument
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/art/compiler/dex/quick/x86/ |
H A D | call_x86.cc | 122 /* branch_over target here */ 123 LIR* target = NewLIR0(kPseudoTargetLabel); local 124 branch_over->target = target; 200 LIR* target = NewLIR0(kPseudoTargetLabel); local 201 branch_over->target = target; 255 // Assumes codegen and target are in thumb2 mode.
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/art/compiler/ |
H A D | elf_patcher.cc | 197 mirror::ArtMethod* target = GetTargetMethod(patch); local 198 uintptr_t quick_code = reinterpret_cast<uintptr_t>(class_linker->GetQuickOatCodeFor(target)); 199 DCHECK_NE(quick_code, 0U) << PrettyMethod(target); 202 // Get where the data actually starts. if target is this oat_file_ it is oat_data_start_, 213 CHECK(target->IsNative()); 247 mirror::ArtMethod* target = GetTargetMethod(patch); local 248 SetPatchLocation(patch, PointerToLowMemUInt32(get_image_address_(cb_data_, target))); 255 mirror::Class* target = GetTargetType(patch); local 256 SetPatchLocation(patch, PointerToLowMemUInt32(get_image_address_(cb_data_, target)));
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/art/runtime/ |
H A D | lock_word.h | 91 static LockWord FromForwardingAddress(size_t target) { argument 92 DCHECK(IsAligned < 1 << kStateSize>(target)); 93 return LockWord((target >> kStateSize) | (kStateForwardingAddress << kStateShift));
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/art/compiler/utils/arm/ |
H A D | assembler_thumb2.h | 160 void cbz(Register rn, Label* target) OVERRIDE; 161 void cbnz(Register rn, Label* target) OVERRIDE; 458 // going forward, because we haven't seen the target address yet), so we need to assume 459 // that it is going to be one of 16 or 32 bits. When we know the target (the label is 'bound') 461 // we knew the target there will be no room in the instruction sequence for the new 466 // bind a label to a branch (we then know the target address) we determine if the branch 478 // b<cond> target 521 // Resolved branch (can't be compare-and-branch) with a target and possibly a condition. 522 Branch(const Thumb2Assembler* assembler, Type type, uint32_t location, uint32_t target, argument 525 target_(target), cond 537 Resolve(uint32_t target) argument 672 AddBranch(Branch::Type type, uint32_t location, uint32_t target, Condition cond = AL) argument [all...] |