1/*
2 * Copyright (C) 2013 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *  * Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 *  * Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in
12 *    the documentation and/or other materials provided with the
13 *    distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28/*
29 * Copyright (c) 2013 ARM Ltd
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 *    notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 *    notice, this list of conditions and the following disclaimer in the
39 *    documentation and/or other materials provided with the distribution.
40 * 3. The name of the company may not be used to endorse or promote
41 *    products derived from this software without specific prior written
42 *    permission.
43 *
44 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
45 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
46 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
47 * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
49 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
50 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
51 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
52 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
53 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include <private/bionic_asm.h>
57
58    .syntax unified
59
60    .thumb
61    .thumb_func
62
63ENTRY(strlen)
64    pld     [r0, #0]
65    mov     r1, r0
66
67    ands    r3, r0, #7
68    beq     mainloop
69
70    // Align to a double word (64 bits).
71    rsb     r3, r3, #8
72    lsls    ip, r3, #31
73    beq     align_to_32
74
75    ldrb    r2, [r1], #1
76    cbz     r2, update_count_and_return
77
78align_to_32:
79    bcc     align_to_64
80    ands    ip, r3, #2
81    beq     align_to_64
82
83    ldrb    r2, [r1], #1
84    cbz     r2, update_count_and_return
85    ldrb    r2, [r1], #1
86    cbz     r2, update_count_and_return
87
88align_to_64:
89    tst     r3, #4
90    beq     mainloop
91    ldr     r3, [r1], #4
92
93    sub     ip, r3, #0x01010101
94    bic     ip, ip, r3
95    ands    ip, ip, #0x80808080
96    bne     zero_in_second_register
97
98    .p2align 2
99mainloop:
100    ldrd    r2, r3, [r1], #8
101
102    pld     [r1, #64]
103
104    sub     ip, r2, #0x01010101
105    bic     ip, ip, r2
106    ands    ip, ip, #0x80808080
107    bne     zero_in_first_register
108
109    sub     ip, r3, #0x01010101
110    bic     ip, ip, r3
111    ands    ip, ip, #0x80808080
112    bne     zero_in_second_register
113    b       mainloop
114
115update_count_and_return:
116    sub     r0, r1, r0
117    sub     r0, r0, #1
118    bx      lr
119
120zero_in_first_register:
121    sub     r0, r1, r0
122    lsls    r3, ip, #17
123    bne     sub8_and_return
124    bcs     sub7_and_return
125    lsls    ip, ip, #1
126    bne     sub6_and_return
127
128    sub     r0, r0, #5
129    bx      lr
130
131sub8_and_return:
132    sub     r0, r0, #8
133    bx      lr
134
135sub7_and_return:
136    sub     r0, r0, #7
137    bx      lr
138
139sub6_and_return:
140    sub     r0, r0, #6
141    bx      lr
142
143zero_in_second_register:
144    sub     r0, r1, r0
145    lsls    r3, ip, #17
146    bne     sub4_and_return
147    bcs     sub3_and_return
148    lsls    ip, ip, #1
149    bne     sub2_and_return
150
151    sub     r0, r0, #1
152    bx      lr
153
154sub4_and_return:
155    sub     r0, r0, #4
156    bx      lr
157
158sub3_and_return:
159    sub     r0, r0, #3
160    bx      lr
161
162sub2_and_return:
163    sub     r0, r0, #2
164    bx      lr
165END(strlen)
166