1/*
2 * Permission is hereby granted, free of charge, to any person obtaining a
3 * copy of this software and associated documentation files (the "Software"),
4 * to deal in the Software without restriction, including without limitation
5 * on the rights to use, copy, modify, merge, publish, distribute, sub
6 * license, and/or sell copies of the Software, and to permit persons to whom
7 * the Software is furnished to do so, subject to the following conditions:
8 *
9 * The above copyright notice and this permission notice (including the next
10 * paragraph) shall be included in all copies or substantial portions of the
11 * Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * Authors:
22 *      Adam Rak <adam.rak@streamnovation.com>
23 */
24
25#ifndef EVERGREEN_COMPUTE_INTERNAL_H
26#define EVERGREEN_COMPUTE_INTERNAL_H
27
28#include "compute_memory_pool.h"
29
30enum evergreen_compute_resources
31{
32#define DECL_COMPUTE_RESOURCE(name, n) COMPUTE_RESOURCE_ ## name ,
33#include "compute_resource.def"
34#undef DECL_COMPUTE_RESOURCE
35__COMPUTE_RESOURCE_END__
36};
37
38typedef unsigned u32;
39
40#define COMPUTE_RES_TC_FLUSH      0xF0001
41#define COMPUTE_RES_VC_FLUSH      0xF0002
42#define COMPUTE_RES_SH_FLUSH      0xF0004
43#define COMPUTE_RES_CB_FLUSH(x)  (0xF0008 | x << 8)
44#define COMPUTE_RES_FULL_FLUSH    0xF0010
45
46struct evergreen_compute_resource {
47	int enabled;
48
49	int do_reloc[256];
50	u32 cs[256];
51	int cs_end;
52
53	struct r600_resource *bo;
54	int coher_bo_size;
55	enum radeon_bo_usage usage;
56	int flags; ///flags for COMPUTE_RES_*_FLUSH
57};
58
59struct compute_sampler_state {
60	struct r600_pipe_state base;
61	struct pipe_sampler_state state;
62};
63
64struct number_type_and_format {
65	unsigned format;
66	unsigned number_type;
67	unsigned num_format_all;
68};
69
70struct r600_pipe_compute {
71	struct r600_context *ctx;
72	struct r600_bytecode bc;
73	struct tgsi_token *tokens;
74
75	struct evergreen_compute_resource *resources;
76
77	unsigned local_size;
78	unsigned private_size;
79	unsigned input_size;
80#ifdef HAVE_OPENCL
81	LLVMModuleRef mod;
82#endif
83	struct r600_resource *kernel_param;
84	struct r600_resource *shader_code_bo;
85};
86
87int evergreen_compute_get_gpu_format(struct number_type_and_format* fmt, struct r600_resource *bo); ///get hw format from resource, return 0 on faliure, nonzero on success
88
89
90void evergreen_emit_raw_reg_set(struct evergreen_compute_resource* res, unsigned index, int num);
91void evergreen_emit_ctx_reg_set(struct r600_context *ctx, unsigned index, int num);
92void evergreen_emit_raw_value(struct evergreen_compute_resource* res, unsigned value);
93void evergreen_emit_ctx_value(struct r600_context *ctx, unsigned value);
94void evergreen_mult_reg_set_(struct evergreen_compute_resource* res,  int index, u32* array, int size);
95void evergreen_emit_ctx_reloc(struct r600_context *ctx, struct r600_resource *bo, enum radeon_bo_usage usage);
96void evergreen_reg_set(struct evergreen_compute_resource* res, unsigned index, unsigned value);
97void evergreen_emit_force_reloc(struct evergreen_compute_resource* res);
98
99struct evergreen_compute_resource* get_empty_res(struct r600_pipe_compute*, enum evergreen_compute_resources res_code, int index);
100int get_compute_resource_num(void);
101
102#define evergreen_mult_reg_set(res, index, array) evergreen_mult_reg_set_(res, index, array, sizeof(array))
103
104void evergreen_set_rat(struct r600_pipe_compute *pipe, int id, struct r600_resource* bo, int start, int size);
105void evergreen_set_gds(struct r600_pipe_compute *pipe, uint32_t addr, uint32_t size);
106void evergreen_set_export(struct r600_pipe_compute *pipe, struct r600_resource* bo, int offset, int size);
107void evergreen_set_loop_const(struct r600_pipe_compute *pipe, int id, int count, int init, int inc);
108void evergreen_set_tmp_ring(struct r600_pipe_compute *pipe, struct r600_resource* bo, int offset, int size, int se);
109void evergreen_set_tex_resource(struct r600_pipe_compute *pipe, struct r600_pipe_sampler_view* view, int id);
110void evergreen_set_sampler_resource(struct r600_pipe_compute *pipe, struct compute_sampler_state *sampler, int id);
111void evergreen_set_const_cache(struct r600_pipe_compute *pipe, int cache_id, struct r600_resource* cbo, int size, int offset);
112
113struct r600_resource* r600_compute_buffer_alloc_vram(struct r600_screen *screen, unsigned size);
114
115#endif
116