gen7_misc_state.c revision a98dd64af750fb6dae54b2dc02e0c5a3711156af 
1/*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#include "intel_batchbuffer.h"
25#include "intel_regions.h"
26#include "intel_fbo.h"
27#include "brw_context.h"
28#include "brw_state.h"
29#include "brw_defines.h"
30
31unsigned int
32gen7_depth_format(struct brw_context *brw)
33{
34   struct intel_context *intel = &brw->intel;
35   struct gl_context *ctx = &intel->ctx;
36   struct gl_framebuffer *fb = ctx->DrawBuffer;
37   struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
38   struct intel_renderbuffer *srb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
39   struct intel_region *region = NULL;
40
41   if (drb)
42      region = drb->region;
43   else if (srb)
44      region = srb->region;
45   else
46      return BRW_DEPTHFORMAT_D32_FLOAT;
47
48   switch (region->cpp) {
49   case 2:
50      return BRW_DEPTHFORMAT_D16_UNORM;
51   case 4:
52      if (intel->depth_buffer_is_float)
53	 return BRW_DEPTHFORMAT_D32_FLOAT;
54      else
55	 return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT;
56   default:
57      assert(!"Should not get here.");
58   }
59   return 0;
60}
61
62static void emit_depthbuffer(struct brw_context *brw)
63{
64   struct intel_context *intel = &brw->intel;
65   struct gl_context *ctx = &intel->ctx;
66   struct gl_framebuffer *fb = ctx->DrawBuffer;
67   struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH);
68   struct intel_renderbuffer *srb = intel_get_renderbuffer(fb, BUFFER_STENCIL);
69   struct intel_region *region = NULL;
70
71   /* _NEW_BUFFERS */
72   if (drb)
73      region = drb->region;
74   else if (srb)
75      region = srb->region;
76
77   if (region == NULL) {
78      BEGIN_BATCH(7);
79      OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2));
80      OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
81		(BRW_SURFACE_NULL << 29));
82      OUT_BATCH(0);
83      OUT_BATCH(0);
84      OUT_BATCH(0);
85      OUT_BATCH(0);
86      OUT_BATCH(0);
87      ADVANCE_BATCH();
88   } else {
89      assert(region->tiling == I915_TILING_Y);
90
91      BEGIN_BATCH(7);
92      OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER << 16 | (7 - 2));
93      OUT_BATCH(((region->pitch * region->cpp) - 1) |
94		(gen7_depth_format(brw) << 18) |
95		(0 << 22) /* no HiZ buffer */ |
96		(0 << 27) /* no stencil write */ |
97		((ctx->Depth.Mask != 0) << 28) |
98		(BRW_SURFACE_2D << 29));
99      OUT_RELOC(region->buffer,
100	        I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
101		0);
102      OUT_BATCH(((region->width - 1) << 4) | ((region->height - 1) << 18));
103      OUT_BATCH(0);
104      OUT_BATCH(0);
105      OUT_BATCH(0);
106      ADVANCE_BATCH();
107   }
108
109   BEGIN_BATCH(4);
110   OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (4 - 2));
111   OUT_BATCH(0);
112   OUT_BATCH(0);
113   OUT_BATCH(0);
114   ADVANCE_BATCH();
115
116   BEGIN_BATCH(4);
117   OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER << 16 | (4 - 2));
118   OUT_BATCH(0);
119   OUT_BATCH(0);
120   OUT_BATCH(0);
121   ADVANCE_BATCH();
122
123   BEGIN_BATCH(3);
124   OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS << 16 | (3 - 2));
125   OUT_BATCH(0);
126   OUT_BATCH(0);
127   ADVANCE_BATCH();
128}
129
130/**
131 * \see brw_context.state.depth_region
132 */
133const struct brw_tracked_state gen7_depthbuffer = {
134   .dirty = {
135      .mesa = _NEW_BUFFERS,
136      .brw = BRW_NEW_BATCH,
137      .cache = 0,
138   },
139   .emit = emit_depthbuffer,
140};
141