1/* 2 * parallel.h 3 * 4 * ParPort driver interface 5 * 6 * This file is part of the w32api package. 7 * 8 * Contributors: 9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net> 10 * 11 * THIS SOFTWARE IS NOT COPYRIGHTED 12 * 13 * This source code is offered for use in the public domain. You may 14 * use, modify or distribute it freely. 15 * 16 * This code is distributed in the hope that it will be useful but 17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY 18 * DISCLAIMED. This includes but is not limited to warranties of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 20 * 21 */ 22 23#ifndef __PARALLEL_H 24#define __PARALLEL_H 25 26#include "ntddpar.h" 27 28#ifdef __cplusplus 29extern "C" { 30#endif 31 32#define DD_PARALLEL_PORT_BASE_NAME "ParallelPort" 33#define DD_PARALLEL_PORT_BASE_NAME_U L"ParallelPort" 34 35#define IOCTL_INTERNAL_DESELECT_DEVICE \ 36 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS) 37#define IOCTL_INTERNAL_GET_MORE_PARALLEL_PORT_INFO \ 38 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS) 39#define IOCTL_INTERNAL_GET_PARALLEL_PNP_INFO \ 40 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS) 41#define IOCTL_INTERNAL_GET_PARALLEL_PORT_INFO \ 42 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS) 43#define IOCTL_INTERNAL_INIT_1284_3_BUS \ 44 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS) 45#define IOCTL_INTERNAL_PARALLEL_CLEAR_CHIP_MODE \ 46 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS) 47#define IOCTL_INTERNAL_PARALLEL_CONNECT_INTERRUPT \ 48 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS) 49#define IOCTL_INTERNAL_PARALLEL_DISCONNECT_INTERRUPT \ 50 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS) 51#define IOCTL_INTERNAL_PARALLEL_PORT_ALLOCATE \ 52 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS) 53#define IOCTL_INTERNAL_PARALLEL_PORT_FREE \ 54 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 40, METHOD_BUFFERED, FILE_ANY_ACCESS) 55#define IOCTL_INTERNAL_PARALLEL_SET_CHIP_MODE \ 56 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS) 57#define IOCTL_INTERNAL_RELEASE_PARALLEL_PORT_INFO \ 58 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS) 59#define IOCTL_INTERNAL_SELECT_DEVICE \ 60 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS) 61 62 63typedef struct _PARALLEL_1284_COMMAND { 64 UCHAR ID; 65 UCHAR Port; 66 ULONG CommandFlags; 67} PARALLEL_1284_COMMAND, *PPARALLEL_1284_COMMAND; 68 69/* PARALLEL_1284_COMMAND.CommandFlags */ 70#define PAR_END_OF_CHAIN_DEVICE 0x00000001 71#define PAR_HAVE_PORT_KEEP_PORT 0x00000002 72 73typedef struct _MORE_PARALLEL_PORT_INFORMATION { 74 INTERFACE_TYPE InterfaceType; 75 ULONG BusNumber; 76 ULONG InterruptLevel; 77 ULONG InterruptVector; 78 KAFFINITY InterruptAffinity; 79 KINTERRUPT_MODE InterruptMode; 80} MORE_PARALLEL_PORT_INFORMATION, *PMORE_PARALLEL_PORT_INFORMATION; 81 82typedef NTSTATUS 83(NTAPI *PPARALLEL_SET_CHIP_MODE)( 84 IN PVOID SetChipContext, 85 IN UCHAR ChipMode); 86 87typedef NTSTATUS 88(NTAPI *PPARALLEL_CLEAR_CHIP_MODE)( 89 IN PVOID ClearChipContext, 90 IN UCHAR ChipMode); 91 92typedef NTSTATUS 93(NTAPI *PPARCHIP_CLEAR_CHIP_MODE)( 94 IN PVOID ClearChipContext, 95 IN UCHAR ChipMode); 96 97typedef NTSTATUS 98(NTAPI *PPARALLEL_TRY_SELECT_ROUTINE)( 99 IN PVOID TrySelectContext, 100 IN PVOID TrySelectCommand); 101 102typedef NTSTATUS 103(NTAPI *PPARALLEL_DESELECT_ROUTINE)( 104 IN PVOID DeselectContext, 105 IN PVOID DeselectCommand); 106 107/* PARALLEL_PNP_INFORMATION.HardwareCapabilities */ 108#define PPT_NO_HARDWARE_PRESENT 0x00000000 109#define PPT_ECP_PRESENT 0x00000001 110#define PPT_EPP_PRESENT 0x00000002 111#define PPT_EPP_32_PRESENT 0x00000004 112#define PPT_BYTE_PRESENT 0x00000008 113#define PPT_BIDI_PRESENT 0x00000008 114#define PPT_1284_3_PRESENT 0x00000010 115 116typedef struct _PARALLEL_PNP_INFORMATION { 117 PHYSICAL_ADDRESS OriginalEcpController; 118 PUCHAR EcpController; 119 ULONG SpanOfEcpController; 120 ULONG PortNumber; 121 ULONG HardwareCapabilities; 122 PPARALLEL_SET_CHIP_MODE TrySetChipMode; 123 PPARALLEL_CLEAR_CHIP_MODE ClearChipMode; 124 ULONG FifoDepth; 125 ULONG FifoWidth; 126 PHYSICAL_ADDRESS EppControllerPhysicalAddress; 127 ULONG SpanOfEppController; 128 ULONG Ieee1284_3DeviceCount; 129 PPARALLEL_TRY_SELECT_ROUTINE TrySelectDevice; 130 PPARALLEL_DESELECT_ROUTINE DeselectDevice; 131 PVOID Context; 132 ULONG CurrentMode; 133 PWSTR PortName; 134} PARALLEL_PNP_INFORMATION, *PPARALLEL_PNP_INFORMATION; 135 136typedef BOOLEAN 137(NTAPI *PPARALLEL_TRY_ALLOCATE_ROUTINE)( 138 IN PVOID TryAllocateContext); 139 140typedef VOID 141(NTAPI *PPARALLEL_FREE_ROUTINE)( 142 IN PVOID FreeContext); 143 144typedef ULONG 145(NTAPI *PPARALLEL_QUERY_WAITERS_ROUTINE)( 146 IN PVOID QueryAllocsContext); 147 148typedef struct _PARALLEL_PORT_INFORMATION { 149 PHYSICAL_ADDRESS OriginalController; 150 PUCHAR Controller; 151 ULONG SpanOfController; 152 PPARALLEL_TRY_ALLOCATE_ROUTINE TryAllocatePort; 153 PPARALLEL_FREE_ROUTINE FreePort; 154 PPARALLEL_QUERY_WAITERS_ROUTINE QueryNumWaiters; 155 PVOID Context; 156} PARALLEL_PORT_INFORMATION, *PPARALLEL_PORT_INFORMATION; 157 158/* PARALLEL_CHIP_MODE.ModeFlags */ 159#define INITIAL_MODE 0x00 160#define PARCHIP_ECR_ARBITRATOR 0x01 161 162typedef struct _PARALLEL_CHIP_MODE { 163 UCHAR ModeFlags; 164 BOOLEAN success; 165} PARALLEL_CHIP_MODE, *PPARALLEL_CHIP_MODE; 166 167typedef VOID 168(NTAPI *PPARALLEL_DEFERRED_ROUTINE)( 169 IN PVOID DeferredContext); 170 171typedef struct _PARALLEL_INTERRUPT_SERVICE_ROUTINE { 172 PKSERVICE_ROUTINE InterruptServiceRoutine; 173 PVOID InterruptServiceContext; 174 PPARALLEL_DEFERRED_ROUTINE DeferredPortCheckRoutine; 175 PVOID DeferredPortCheckContext; 176} PARALLEL_INTERRUPT_SERVICE_ROUTINE, *PPARALLEL_INTERRUPT_SERVICE_ROUTINE; 177 178 179#define IOCTL_INTERNAL_DISCONNECT_IDLE \ 180 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS) 181#define IOCTL_INTERNAL_LOCK_PORT \ 182 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS) 183#define IOCTL_INTERNAL_LOCK_PORT_NO_SELECT \ 184 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 52, METHOD_BUFFERED, FILE_ANY_ACCESS) 185#define IOCTL_INTERNAL_PARCLASS_CONNECT \ 186 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS) 187#define IOCTL_INTERNAL_PARCLASS_DISCONNECT \ 188 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS) 189#define IOCTL_INTERNAL_UNLOCK_PORT \ 190 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS) 191#define IOCTL_INTERNAL_UNLOCK_PORT_NO_DESELECT \ 192 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 53, METHOD_BUFFERED, FILE_ANY_ACCESS) 193 194typedef USHORT 195(NTAPI *PDETERMINE_IEEE_MODES)( 196 IN PVOID Context); 197 198typedef enum _PARALLEL_SAFETY { 199 SAFE_MODE, 200 UNSAFE_MODE 201} PARALLEL_SAFETY; 202 203typedef NTSTATUS 204(NTAPI *PNEGOTIATE_IEEE_MODE)( 205 IN PVOID Context, 206 IN USHORT ModeMaskFwd, 207 IN USHORT ModeMaskRev, 208 IN PARALLEL_SAFETY ModeSafety, 209 IN BOOLEAN IsForward); 210 211typedef NTSTATUS 212(NTAPI *PTERMINATE_IEEE_MODE)( 213 IN PVOID Context); 214 215typedef NTSTATUS 216(NTAPI *PPARALLEL_IEEE_FWD_TO_REV)( 217 IN PVOID Context); 218 219typedef NTSTATUS 220(NTAPI *PPARALLEL_IEEE_REV_TO_FWD)( 221 IN PVOID Context); 222 223typedef NTSTATUS 224(NTAPI *PPARALLEL_READ)( 225 IN PVOID Context, 226 OUT PVOID Buffer, 227 IN ULONG NumBytesToRead, 228 OUT PULONG NumBytesRead, 229 IN UCHAR Channel); 230 231typedef NTSTATUS 232(NTAPI *PPARALLEL_WRITE)( 233 IN PVOID Context, 234 OUT PVOID Buffer, 235 IN ULONG NumBytesToWrite, 236 OUT PULONG NumBytesWritten, 237 IN UCHAR Channel); 238 239typedef NTSTATUS 240(NTAPI *PPARALLEL_TRYSELECT_DEVICE)( 241 IN PVOID Context, 242 IN PARALLEL_1284_COMMAND Command); 243 244typedef NTSTATUS 245(NTAPI *PPARALLEL_DESELECT_DEVICE)( 246 IN PVOID Context, 247 IN PARALLEL_1284_COMMAND Command); 248 249typedef struct _PARCLASS_INFORMATION { 250 PUCHAR Controller; 251 PUCHAR EcrController; 252 ULONG SpanOfController; 253 PDETERMINE_IEEE_MODES DetermineIeeeModes; 254 PNEGOTIATE_IEEE_MODE NegotiateIeeeMode; 255 PTERMINATE_IEEE_MODE TerminateIeeeMode; 256 PPARALLEL_IEEE_FWD_TO_REV IeeeFwdToRevMode; 257 PPARALLEL_IEEE_REV_TO_FWD IeeeRevToFwdMode; 258 PPARALLEL_READ ParallelRead; 259 PPARALLEL_WRITE ParallelWrite; 260 PVOID ParclassContext; 261 ULONG HardwareCapabilities; 262 ULONG FifoDepth; 263 ULONG FifoWidth; 264 PPARALLEL_TRYSELECT_DEVICE ParallelTryselect; 265 PPARALLEL_DESELECT_DEVICE ParallelDeSelect; 266} PARCLASS_INFORMATION, *PPARCLASS_INFORMATION; 267 268#ifdef __cplusplus 269} 270#endif 271 272#endif /* __PARALLEL_H */ 273