1/*
2 * Copyright (C) 2010 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *      http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef ANDROID_CUTILS_ATOMIC_MIPS_H
18#define ANDROID_CUTILS_ATOMIC_MIPS_H
19
20#include <stdint.h>
21
22#ifndef ANDROID_ATOMIC_INLINE
23#define ANDROID_ATOMIC_INLINE inline __attribute__((always_inline))
24#endif
25
26extern ANDROID_ATOMIC_INLINE void android_compiler_barrier(void)
27{
28    __asm__ __volatile__ ("" : : : "memory");
29}
30
31#if ANDROID_SMP == 0
32extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void)
33{
34    android_compiler_barrier();
35}
36#else
37extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void)
38{
39    __asm__ __volatile__ ("sync" : : : "memory");
40}
41#endif
42
43extern ANDROID_ATOMIC_INLINE int32_t
44android_atomic_acquire_load(volatile const int32_t *ptr)
45{
46    int32_t value = *ptr;
47    android_memory_barrier();
48    return value;
49}
50
51extern ANDROID_ATOMIC_INLINE int32_t
52android_atomic_release_load(volatile const int32_t *ptr)
53{
54    android_memory_barrier();
55    return *ptr;
56}
57
58extern ANDROID_ATOMIC_INLINE void
59android_atomic_acquire_store(int32_t value, volatile int32_t *ptr)
60{
61    *ptr = value;
62    android_memory_barrier();
63}
64
65extern ANDROID_ATOMIC_INLINE void
66android_atomic_release_store(int32_t value, volatile int32_t *ptr)
67{
68    android_memory_barrier();
69    *ptr = value;
70}
71
72extern ANDROID_ATOMIC_INLINE int
73android_atomic_cas(int32_t old_value, int32_t new_value, volatile int32_t *ptr)
74{
75    int32_t prev, status;
76    do {
77        __asm__ __volatile__ (
78            "    ll     %[prev], (%[ptr])\n"
79            "    li     %[status], 1\n"
80            "    bne    %[prev], %[old], 9f\n"
81            "    move   %[status], %[new_value]\n"
82            "    sc     %[status], (%[ptr])\n"
83            "9:\n"
84            : [prev] "=&r" (prev), [status] "=&r" (status)
85            : [ptr] "r" (ptr), [old] "r" (old_value), [new_value] "r" (new_value)
86            );
87    } while (__builtin_expect(status == 0, 0));
88    return prev != old_value;
89}
90
91extern ANDROID_ATOMIC_INLINE int
92android_atomic_acquire_cas(int32_t old_value,
93                           int32_t new_value,
94                           volatile int32_t *ptr)
95{
96    int status = android_atomic_cas(old_value, new_value, ptr);
97    android_memory_barrier();
98    return status;
99}
100
101extern ANDROID_ATOMIC_INLINE int
102android_atomic_release_cas(int32_t old_value,
103                           int32_t new_value,
104                           volatile int32_t *ptr)
105{
106    android_memory_barrier();
107    return android_atomic_cas(old_value, new_value, ptr);
108}
109
110
111extern ANDROID_ATOMIC_INLINE int32_t
112android_atomic_add(int32_t increment, volatile int32_t *ptr)
113{
114    int32_t prev, status;
115    android_memory_barrier();
116    do {
117        __asm__ __volatile__ (
118        "    ll    %[prev], (%[ptr])\n"
119        "    addu  %[status], %[prev], %[inc]\n"
120        "    sc    %[status], (%[ptr])\n"
121        :  [status] "=&r" (status), [prev] "=&r" (prev)
122        :  [ptr] "r" (ptr), [inc] "Ir" (increment)
123        );
124    } while (__builtin_expect(status == 0, 0));
125    return prev;
126}
127
128extern ANDROID_ATOMIC_INLINE int32_t
129android_atomic_inc(volatile int32_t *addr)
130{
131    return android_atomic_add(1, addr);
132}
133
134extern ANDROID_ATOMIC_INLINE int32_t
135android_atomic_dec(volatile int32_t *addr)
136{
137    return android_atomic_add(-1, addr);
138}
139
140extern ANDROID_ATOMIC_INLINE int32_t
141android_atomic_and(int32_t value, volatile int32_t *ptr)
142{
143    int32_t prev, status;
144    android_memory_barrier();
145    do {
146        __asm__ __volatile__ (
147        "    ll    %[prev], (%[ptr])\n"
148        "    and   %[status], %[prev], %[value]\n"
149        "    sc    %[status], (%[ptr])\n"
150        : [prev] "=&r" (prev), [status] "=&r" (status)
151        : [ptr] "r" (ptr), [value] "Ir" (value)
152            );
153    } while (__builtin_expect(status == 0, 0));
154    return prev;
155}
156
157extern ANDROID_ATOMIC_INLINE int32_t
158android_atomic_or(int32_t value, volatile int32_t *ptr)
159{
160    int32_t prev, status;
161    android_memory_barrier();
162    do {
163        __asm__ __volatile__ (
164        "    ll    %[prev], (%[ptr])\n"
165        "    or    %[status], %[prev], %[value]\n"
166        "    sc    %[status], (%[ptr])\n"
167        : [prev] "=&r" (prev), [status] "=&r" (status)
168        : [ptr] "r" (ptr), [value] "Ir" (value)
169            );
170    } while (__builtin_expect(status == 0, 0));
171    return prev;
172}
173
174#endif /* ANDROID_CUTILS_ATOMIC_MIPS_H */
175