History log of /external/llvm/include/llvm/CodeGen/LinkAllCodegenComponents.h
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
477de3a7859104d7c41a36628169e13e524e980a 25-Mar-2013 Yiannis Tsiouris <gtsiour@softlab.ntua.gr> Add a GC plugin for Erlang

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177867 91177308-0d34-0410-b5e6-96231b3b80d8
255f89faee13dc491cb64fbeae3c763e7e2ea4e6 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Sort the #include lines for the include/... tree with the script.

AKA: Recompile *ALL* the source code!

This one went much better. No manual edits here. I spot-checked for
silliness and grep-checked for really broken edits and everything seemed
good. It all still compiles. Yell if you see something that looks goofy.

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1dd8c8560d45d36a8e507cd014352f1d313f9f9e 08-Feb-2012 Andrew Trick <atrick@apple.com> Codegen pass definition cleanup. No functionality.

Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.

While cleaning up declarations, cleaned up comments (sorry for large diff).

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ee498d3254b86bceb4f441741e9f442990647ce6 01-Feb-2012 Andrew Trick <atrick@apple.com> VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).

This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

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799c1ede712854f56ed85b74702e611b88b49436 12-Nov-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Delete the linear scan register allocator.

RegAllocGreedy has been the default for six months now.

Deleting RegAllocLinearScan makes it possible to also delete
VirtRegRewriter and clean up the spiller code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144475 91177308-0d34-0410-b5e6-96231b3b80d8
83dae4466e3abfd1493453588809e9f9ff10ebca 24-Oct-2011 Dan Gohman <gohman@apple.com> Delete the top-down "Latency" scheduler. Top-down scheduling doesn't handle
physreg dependencies, and upcoming codegen changes will require proper
physreg dependence handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142816 91177308-0d34-0410-b5e6-96231b3b80d8
ff764815e6531be6b2d944bd6a3f1fcfc682db01 20-Oct-2011 Dan Gohman <gohman@apple.com> Delete the list-tdrr scheduler. Top-down schedulers are going away
because they don't support physical register dependencies.

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5b220213bfe9c37c2bb41a7ae0804e06a14f1007 27-Jun-2011 Rafael Espindola <rafael.espindola@gmail.com> There is only one register coalescer. Merge it into the base class and
remove the analysis group.

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cba2e06d525b723849cd8e1f083eb1e59a494b4e 08-Dec-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Stub out RegAllocGreedy.

This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.

RegAllocGreedy will eventually replace linear scan.

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14e8d71cc945034d4ee6e76be00e00f14efac62f 23-Oct-2010 Andrew Trick <atrick@apple.com> This is a prototype of an experimental register allocation
framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting.

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.

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f70e7cc7a2871d498dbecbec2d1c3beb3da2af33 23-Sep-2010 Lang Hames <lhames@gmail.com> Moved the PBQP allocator class out of the header and back in to the cpp file to hide the gory details.
Allocator instances can now be created by calling createPBQPRegisterAllocator.

Tidied up use of CoalescerPair as per Jakob's suggestions.

Made the new PBQPBuilder based construction process the default. The internal construction process
remains in-place and available via -pbqp-builder=false for now. It will be removed shortly if the new
process doesn't cause any regressions.

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8a3eab9b20acb7193285bc31c9a3e23c7c7d7173 15-Jun-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove the local register allocator.
Please use the fast allocator instead.

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15a16def6e70c8f7df1023da80ceb89887203b40 20-May-2010 Evan Cheng <evan.cheng@apple.com> Add a hybrid bottom up scheduler that reduce register usage while avoiding
pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.

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00207237ddfffe93b275914d086a0c7da1bbf63b 21-Apr-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Add fast register allocator, enabled with -regalloc=fast.

So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.

The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are

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187361b056823df4ff292561fe47468dad956872 23-Jan-2010 Bill Wendling <isanbard@gmail.com> Remove the '-disable-scheduling' flag and replace it with the 'source' option of
the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also,
keep track of the SDNode ordering by default. Eventually, we would like to make
this ordering a way to break a "tie" in the scheduler. However, doing that now
breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux.

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7896c9f436a4eda5ec15e882a7505ba482a2fcd0 03-Dec-2009 Chris Lattner <sabre@nondot.org> improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!

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f436463dbd35ea816163a053b304d9fef9e0cf25 17-Sep-2009 Evan Cheng <evan.cheng@apple.com> Remove simple regalloc. It has bit rotted.

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2f75c727f2bc4d76036d12a65c5e21a37e097b90 31-Jul-2009 Lang Hames <lhames@gmail.com> Removed the BigBlock register allocator.

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98a366d547772010e94609e4584489b3e5ce0043 30-Apr-2009 Bill Wendling <isanbard@gmail.com> Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

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be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b 29-Apr-2009 Bill Wendling <isanbard@gmail.com> Second attempt:

Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

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c69d56f1154342a57c9bdd4c17a10333e3520127 28-Apr-2009 Bill Wendling <isanbard@gmail.com> r70270 isn't ready yet. Back this out. Sorry for the noise.

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2e9d5f912a9841d3685ba0241abe1131943fed29 28-Apr-2009 Bill Wendling <isanbard@gmail.com> Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

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79ce276083ced01256a0eb7d80731e4948ca6e87 15-Jan-2009 Dan Gohman <gohman@apple.com> Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
ad38b6e4e51bcda85a0ef3e8dbabde72ca3e008f 24-Nov-2008 Dan Gohman <gohman@apple.com> Move the scheduler constructor functions to SchedulerRegistry.h, to
simplify header dependencies for front-ends that just want to choose
a scheduler and don't need all the scheduling machinery declarations.

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343f0c046702831a4a6aec951b6a297a23241a55 20-Nov-2008 Dan Gohman <gohman@apple.com> Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.

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9b75b373756288cd39489da7994207f50b31ee40 11-Nov-2008 Dan Gohman <gohman@apple.com> Change the scheduler accessor methods to accept an explicit TargetMachine
argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.

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b1290a6cc40f7caa0351450ce7021a0d48b5f2c0 02-Oct-2008 Evan Cheng <evan.cheng@apple.com> A Partitioned Boolean Quadratic Programming (PBQP) based register allocator.

Contributed by Lang Hames.

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ee2e4035450a2d0d6159831e9b9cfa3ffd8da8bc 18-Sep-2008 Dan Gohman <gohman@apple.com> Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with

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d3ead4329eaa46937245f5cc8402e749af2a37dc 17-Sep-2008 Dan Gohman <gohman@apple.com> Add a new MachineInstr-level DCE pass. It is very simple, and is intended to
be used with fast-isel.

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5eca075b74d62c621b160aa216b4cd50829a2cc7 17-Aug-2008 Gordon Henriksen <gordonhenriksen@mac.com> Rename some GC classes so that their roll will hopefully be clearer.

In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:

Collector -> GCStrategy
CollectorMetadata -> GCFunctionInfo
CollectorModuleMetadata -> GCModuleInfo
CollectorRegistry -> GCRegistry
Function::getCollector -> getGC (setGC, hasGC, clearGC)

Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.

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4a8978b61c0536d57bfa32bc5c590fdb6d0113a4 17-Aug-2008 Anton Korobeynikov <asl@math.spbu.ru> Fix merge error

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5a29c9eed157af51a8d338b5a225b146881819e8 17-Aug-2008 Gordon Henriksen <gordonhenriksen@mac.com> Factor GC metadata table assembly generation out of Collector in preparation for splitting AsmPrinter into its own library.

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4576f6d7a9c0f2c6a3b6c5d4d8a3063bbf763ae5 01-Jul-2008 Evan Cheng <evan.cheng@apple.com> Do not use computationally expensive scheduling heuristics with -fast.

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572742e876478d3ec7ff0750c0473d7621804b15 07-Jan-2008 Gordon Henriksen <gordonhenriksen@mac.com> Setting GlobalDirective in TargetAsmInfo by default rather than
providing a misleading facility. It's used once in the MIPS backend
and hardcoded as "\t.globl\t" everywhere else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45676 91177308-0d34-0410-b5e6-96231b3b80d8
8fa89291774a29ee30adb9d0fd01655c84eaac13 07-Jan-2008 Gordon Henriksen <gordonhenriksen@mac.com> With this patch, the LowerGC transformation becomes the
ShadowStackCollector, which additionally has reduced overhead with
no sacrifice in portability.

Considering a function @fun with 8 loop-local roots,
ShadowStackCollector introduces the following overhead

; shadowstack prologue
movl L_llvm_gc_root_chain$non_lazy_ptr, %eax
movl (%eax), %ecx
movl $___gc_fun, 20(%esp)
movl $0, 24(%esp)
movl $0, 28(%esp)
movl $0, 32(%esp)
movl $0, 36(%esp)
movl $0, 40(%esp)
movl $0, 44(%esp)
movl $0, 48(%esp)
movl $0, 52(%esp)
movl %ecx, 16(%esp)
leal 16(%esp), %ecx
movl %ecx, (%eax)

; shadowstack loop overhead

; shadowstack epilogue
movl 48(%esp), %edx
movl %edx, (%ecx)

; shadowstack metadata
.align 3
___gc_fun: # __gc_fun
.long 8
.space 4

In comparison to LowerGC:

; lowergc prologue
movl L_llvm_gc_root_chain$non_lazy_ptr, %eax
movl (%eax), %ecx
movl %ecx, 48(%esp)
movl $8, 52(%esp)
movl $0, 60(%esp)
movl $0, 56(%esp)
movl $0, 68(%esp)
movl $0, 64(%esp)
movl $0, 76(%esp)
movl $0, 72(%esp)
movl $0, 84(%esp)
movl $0, 80(%esp)
movl $0, 92(%esp)
movl $0, 88(%esp)
movl $0, 100(%esp)
movl $0, 96(%esp)
movl $0, 108(%esp)
movl $0, 104(%esp)
movl $0, 116(%esp)
movl $0, 112(%esp)

; lowergc loop overhead
leal 44(%esp), %eax
movl %eax, 56(%esp)
leal 40(%esp), %eax
movl %eax, 64(%esp)
leal 36(%esp), %eax
movl %eax, 72(%esp)
leal 32(%esp), %eax
movl %eax, 80(%esp)
leal 28(%esp), %eax
movl %eax, 88(%esp)
leal 24(%esp), %eax
movl %eax, 96(%esp)
leal 20(%esp), %eax
movl %eax, 104(%esp)
leal 16(%esp), %eax
movl %eax, 112(%esp)

; lowergc epilogue
movl 48(%esp), %edx
movl %edx, (%ecx)

; lowergc metadata

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7ed47a13356daed2a34cd2209a31f92552e3bdd8 29-Dec-2007 Chris Lattner <sabre@nondot.org> Don't attribute in file headers anymore. See llvmdev for the
discussion of this change. Boy are my fingers tired. ;-)

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450ff01faf47b48d9f0aea68b7676a20644fd0fc 01-Oct-2007 Evan Cheng <evan.cheng@apple.com> Remove simple scheduler.

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2c17c4d8d9f232f0329786ad9abee976bc0f3d27 06-Sep-2007 David Greene <greened@obbligato.org> Pluggable coalescers inplementation.

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a8c768293966822840199b496a9b020b6b460e8d 22-Jun-2007 Duraid Madina <duraid@octopus.com.au> check in the BigBlock local register allocator

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fee18ae0744ef3cbcc1d0ea27c2c711f376940db 17-Dec-2006 Bill Wendling <isanbard@gmail.com> Accidental submission.

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5c7e326585f3a543388ba871c3425f7664cd9143 17-Dec-2006 Bill Wendling <isanbard@gmail.com> Added an automatic cast to "std::ostream*" etc. from OStream. We then can
rework the hacks that had us passing OStream in. We pass in std::ostream*
instead, check for null, and then dispatch to the correct print() method.

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9373beba6010dd34316a801c3a9b37ab9e048031 01-Aug-2006 Jim Laskey <jlaskey@mac.com> Now that the ISel is available, it's possible to create a default instruction
scheduler creator.

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9ff542f2cce5bf7bf3cf9f692cf3ec0690ad2b3b 01-Aug-2006 Jim Laskey <jlaskey@mac.com> 1. Change use of "Cache" to "Default".
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.

More to follow.

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c6a0a117a63b22ac8f4ae1aaa16a4a4fb57a45f1 01-Aug-2006 Jim Laskey <jlaskey@mac.com> Forgot the added files for plugable machine passes.

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