| cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
|
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 9add5c2d4b282f7cae583ece5cea3f83d33c488b |
|
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195432:
------------------------------------------------------------------------
r195432 | haoliu | 2013-11-22 01:24:41 -0800 (Fri, 22 Nov 2013) | 3 lines
Fix a Cygwin build failure caused by enum values starting with '_', which is conflicted with some platform macros.
This patch only renames variables, no functional change.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 151dfc7d7ff6406a471058fcd142018a10b0c479 |
|
22-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195423:
------------------------------------------------------------------------
r195423 | haoliu | 2013-11-22 00:34:54 -0800 (Fri, 22 Nov 2013) | 2 lines
Revert last change by haoliu because of buildbot failure.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195429 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 81a22ba0e7e6aa455cc0ee73c8b43171bff237b6 |
|
22-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195421:
------------------------------------------------------------------------
r195421 | haoliu | 2013-11-22 00:17:16 -0800 (Fri, 22 Nov 2013) | 5 lines
Fix a Cygwin build failure caused by enum values starting with '_', which is conflicted with some platform macros.
This solution only renames variables, no functional change.
NOTE: This is a candidate for the 3.4 branch.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195428 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 36c7806f4eacd676932ba630246f88e0e37b1cd4 |
|
19-Nov-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 282a979dddff8d06a744c1b686fb3b7a7619d0f4 |
|
19-Nov-2013 |
Kevin Qin <Kevin.Qin@arm.com> |
implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 421556176882360e6854c77fc658bc4e8de75b58 |
|
15-Nov-2013 |
Alexey Samsonov <samsonov@google.com> |
Hopefully fix uninitialized memory read in AArch64AsmParser found by MSan bootstrap bot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 1343fbcb7e00b12b63ae90b8c211c2d42416a74f |
|
09-Nov-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove some unnecessary temporary strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194335 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 591c2f738a3e12026ff5504a486d54fc21fb3049 |
|
05-Nov-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement AArch64 post-index vector load/store multiple N-element structure class SIMD(lselem-post).
Including following 14 instructions:
4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 1d28917dc39f38847f5c69c0a60cd1491430bdad |
|
31-Oct-2013 |
Chad Rosier <mcrosier@codeaurora.org> |
[AArch64] Add support for NEON scalar shift immediate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 6a5a667517160ca1b557002a29d08868ae029451 |
|
10-Oct-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 812ddcc50f8bc3ec6ce115863ff2263815906aaf |
|
10-Oct-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4)."
This reverts commit r192352. It broke the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| d622bef31d11a5a6429fe7fad557c9b111e96f69 |
|
10-Oct-2013 |
Hao Liu <Hao.Liu@arm.com> |
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192352 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 630c5e06d633fad142af4b145ee684e90754700e |
|
13-Sep-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: use RegisterOperand for NEON registers.
Previously we modelled VPR128 and VPR64 as essentially identical
register-classes containing V0-V31 (which had Q0-Q31 as "sub_alias"
sub-registers). This model is starting to cause significant problems
for code generation, particularly writing EXTRACT/INSERT_SUBREG
patterns for converting between the two.
The change here switches to classifying VPR64 & VPR128 as
RegisterOperands, which are essentially aliases for RegisterClasses
with different parsing and printing behaviour. This fits almost
exactly with their real status (VPR128 == FPR128 printed strangely,
VPR64 == FPR64 printed strangely).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 715d98d657491b3fb8ea0e14643e9801b2f9628c |
|
12-Sep-2013 |
Joey Gouly <joey.gouly@arm.com> |
Add an instruction deprecation feature to TableGen.
The 'Deprecated' class allows you to specify a SubtargetFeature that the
instruction is deprecated on.
The 'ComplexDeprecationPredicate' class allows you to define a custom
predicate that is called to check for deprecation.
For example:
ComplexDeprecationPredicate<"MCR">
would mean you would have to define the following function:
bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
std::string &Info)
Which returns 'false' for not deprecated, and 'true' for deprecated
and store the warning message in 'Info'.
The MCTargetAsmParser constructor was chaned to take an extra argument of
the MCInstrInfo class, so out-of-tree targets will need to be changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190598 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 19fdc268c316b3b0bdcb2b558449819f4f402d6a |
|
04-Sep-2013 |
Hao Liu <Hao.Liu@arm.com> |
Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:
sshr,ushr,ssra,usra,srshr,urshr,srsra,ursra,sri,shl,sli,sqshlu,sqshl,uqshl,shrn,sqrshrun,sqshrn,uqshr,sqrshrn,uqrshrn,sshll,ushll
and 4 convert instructions:
scvtf,ucvtf,fcvtzs,fcvtzu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 87773c318fcee853fb34a80a10c4347d523bdafb |
|
01-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: add initial NEON support
Patch by Ana Pazos.
- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise
- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic
- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same
- Intial implementation of instruction class:
Scalar Arithmetic
- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.
- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| f67c7d7e8c5949037e85dd233876989c1fea7099 |
|
15-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Make some arrays 'static const'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| a3863ea2dacafc925a8272ebf9884fc64bef686c |
|
02-Jul-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove address spaces from MC.
This is dead code since PIC16 was removed in 2010. The result was an odd mix,
where some parts would carefully pass it along and others would assert it was
zero (most of the object streamer for example).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185436 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| a286fc065a5bc846d73c8407a534a1d3c1d70b59 |
|
15-Mar-2013 |
Eric Christopher <echristo@gmail.com> |
Silence anonymous type in anonymous union warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| cb2ae3d98e3bb36e5813f8f69b00d39efd026dcd |
|
20-Feb-2013 |
Jim Grosbach <grosbach@apple.com> |
MCParser: Update method names per coding guidelines.
s/AddDirectiveHandler/addDirectiveHandler/
s/ParseMSInlineAsm/parseMSInlineAsm/
s/ParseIdentifier/parseIdentifier/
s/ParseStringToEndOfStatement/parseStringToEndOfStatement/
s/ParseEscapedString/parseEscapedString/
s/EatToEndOfStatement/eatToEndOfStatement/
s/ParseExpression/parseExpression/
s/ParseParenExpression/parseParenExpression/
s/ParseAbsoluteExpression/parseAbsoluteExpression/
s/CheckForValidSection/checkForValidSection/
http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175675 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 5bd6cb2dabf3fea9cb9fa0b275fbc7ceb85ba970 |
|
14-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: add block comments where missing
Only comments affected. No code change at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 77b1c9cf57849b3f9a4e8bae47cd5954d20a7e11 |
|
11-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: Simplify logic in deciding whether bfi is valid
Previous code had a confusing comment which was mostly an implementation
detail. This condition corresponds to "lsb up to register width" and "width not
ridiculous".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| b5161863866b64498a7faa20e612c55de4bca6f8 |
|
11-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Make use of DiagnosticType to provide better AArch64 diagnostics.
This gives a DiagnosticType to all AsmOperands in sight. This replaces all
"invalid operand" diagnostics with something more specific. The messages given
should still be sufficiently vague that they're not usually actively misleading
when LLVM guesses your instruction incorrectly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| b9e1a33941d25faf54dc3ddec4be7f8f0750a155 |
|
05-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Fix remaining StringRef abuse.
This should fix the valgrind buildbot failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| dfe076af9879eb68a7b8331f9c02eecf563d85be |
|
05-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Fix formatting in AArch64 backend.
This should fix three purely whitespace issues:
+ 80 column violations.
+ Tab characters.
+ TableGen brace placement.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174370 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 19254c49a8752fe8c6fa648a6eb29f20a1f62c8b |
|
05-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove cyclic dependency in AArch64 libraries
This moves the bit twiddling and string fiddling functions required by other
parts of the backend into a separate library. Previously they resided in
AArch64Desc, which created a circular dependency between various components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 42a68443a15d74ada014ad2c8a2349fe134a44f3 |
|
04-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Fix some abuses of StringRef
We were taking a StringRef to a temporary result, which can go horribly wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174328 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|
| 72062f5744557e270a38192554c3126ea5f97434 |
|
31-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add AArch64 as an experimental target.
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
|