History log of /external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
cd81d94322a39503e4a3e87b6ee03d4fcb3465fb 21-Jul-2014 Stephen Hines <srhines@google.com> Update LLVM for rebase to r212749.

Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls

Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
e7ac2ed1c268891a856ab38db1e34372a79da86a 16-Aug-2013 Tom Stellard <thomas.stellard@amd.com> R600: Add IsExport bit to TableGen instruction definitions

Tested-by: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188516 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
e560d526a1aebf45e5333ab7b24689be930a8026 16-Aug-2013 Tom Stellard <thomas.stellard@amd.com> R600: Change the RAT instruction assembly names so they match the docs

Tested-by: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188515 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
692ee102ebef535d311c35d53457028083e5c5be 01-Aug-2013 Tom Stellard <thomas.stellard@amd.com> R600: Add 64-bit float load/store support

* Added R600_Reg64 class
* Added T#Index#.XY registers definition
* Added v2i32 register reads from parameter and global space
* Added f32 and i32 elements extraction from v2f32 and v2i32
* Added v2i32 -> v2f32 conversions

Tom Stellard:
- Mark vec2 operations as expand. The addition of a vec2 register
class made them all legal.

Patch by: Dmitry Cherkassov

Signed-off-by: Dmitry Cherkassov <dcherkassov@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187582 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
acf73503851815f8251b78e3b2e7cf91ef738c50 31-Jul-2013 Vincent Lejeune <vljn@ovi.com> R600: Remove predicated_break inst

We were using two instructions for similar purpose : break and
predicated break. Only predicated_break was emitted and it was
lowered at R600ControlFlowFinalizer to JUMP;CF_BREAK;POP.
This commit simplify the situation by making AMDILCFGStructurizer
emit IF_PREDICATE;BREAK;ENDIF; instead of predicated_break (which
is now removed).

There is no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187510 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
272458bd06d0c6d09e9bf776fb60735b0cdc8cf1 19-Jul-2013 Vincent Lejeune <vljn@ovi.com> R600: Don't emit empty then clause and use alu_pop_after

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
787e71df693e94cc512f3e439bf91609a8ec9bae 15-Jul-2013 Craig Topper <craig.topper@gmail.com> Make some arrays 'static const'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
f2cfef8172fd2eceb036b8caff50623a189ba2ff 09-Jul-2013 Vincent Lejeune <vljn@ovi.com> R600: Do not predicated basic block with multiple alu clause

Test is not included as it is several 1000 lines long.
To test this functionnality, a test case must generate at least 2 ALU clauses,
where an ALU clause is ~110 instructions long.

NOTE: This is a candidate for the stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
4efccd0fb17c9eca776b37b82790c82d772fafc6 15-Jun-2013 Tom Stellard <thomas.stellard@amd.com> R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman

We were using RAT_INST_STORE_RAW, which seemed to work, but the docs
say this instruction doesn't exist for Cayman, so it's probably safer
to use a documented instruction instead.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184015 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
b01bdf87ff5e13eb22fcc20cd395bf282fbf1ecd 08-Jun-2013 Vincent Lejeune <vljn@ovi.com> R600: Anti dep better handled in tex clause

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183592 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
3ff0abfaabc2c7f604d490be587b9c27e7c91ac0 07-Jun-2013 Tom Stellard <thomas.stellard@amd.com> R600: Rework subtarget info and remove AMDILDevice classes

This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183566 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
b5632b5b456db647b42239cbd4d8b58c82290c4e 07-Jun-2013 Bill Wendling <isanbard@gmail.com> Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183561 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
fdf7ab1c69c3d6a68d312c52421c289b13d9eb5e 03-Jun-2013 Vincent Lejeune <vljn@ovi.com> R600: CALL_FS consumes a stack size entry

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183108 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
d078070f6a76326853885bfa661ff4fa9755e2b8 23-May-2013 Tom Stellard <thomas.stellard@amd.com> R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg

Patch by: Vincent Lejeune

https://bugs.freedesktop.org/show_bug.cgi?id=64877

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
5c35290fa35ae234fed02496404cb0fc37e1c8a5 23-May-2013 Benjamin Kramer <benny.kra@googlemail.com> Move passes from namespace llvm into anonymous namespaces. Sort includes while there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182594 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
061ff3409d4f6db313448fa8d916313233789516 23-May-2013 Aaron Ballman <aaron@aaronballman.com> Setting the default value (fixes CRT assertions about uninitialized variable use when doing debug MSVC builds), and fixing coding style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
25c209e9a262b623deca60fb6b886907e22c941b 17-May-2013 Vincent Lejeune <vljn@ovi.com> R600: Some factorization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
dcfcf1d1ffe72d9c25564a2b8b53763a28648e97 17-May-2013 Vincent Lejeune <vljn@ovi.com> R600: Factorize Fetch size limit inside AMDGPUSubTarget

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
5ed88013e86b14e4cd54132408354f6305d43be6 02-May-2013 Vincent Lejeune <vljn@ovi.com> R600: Signed literals are 64bits wide

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
2c836f84dba99e7b041909160c739db779760b79 30-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: use native for alu

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
7097b1ddeab32b72edaf9e0177360b0576b7ecaf 30-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Take inner dependency into tex/vtx clauses

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180757 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
b6379de427c009284d47c5fc764f11bbd2bf2484 30-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Turn TEX/VTX into native instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
631591e6f3e5119d8a8b1c853279bc4ac7ace4a0 30-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions

v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
d8b2da11360419a9f1d569468a9b2a8ca3dace20 30-Apr-2013 Tom Stellard <thomas.stellard@amd.com> R600: Use correct CF_END instruction on Northern Island GPUs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
2a74639bc7713146b1182328892807c421c84265 23-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Use .AMDGPU.config section to emit stacksize

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
7a28d8afa77ac3afce265f2b61fb321e4e0d84d7 23-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Add CF_END

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
4eb5f18956a8e3a0652039f657272729e2381aed 11-Apr-2013 NAKAMURA Takumi <geek4civic@gmail.com> R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
e7a040f9ab8f7e8defa2b9b95d1ea87911636131 11-Apr-2013 NAKAMURA Takumi <geek4civic@gmail.com> Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179262 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
daefc0f9c80363f55c75806dd704d5815e69353b 10-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179174 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
bd7c634ab90ed63ee409fe781360cd42b05780f3 08-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Control Flow support for pre EG gen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179020 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
51f7225f55cd8a83817af3878104102d07a760c9 04-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Fix wrong address when substituting ENDIF

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
39cd6fae34e3cc525bc98b6b0bd24fb8e6202cc5 04-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Take export into account when computing cf address

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178761 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
375d767b5408cb2ba33185921f382c5f1115bce3 03-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
795ecc36692feedc62260a19a8655f4934758689 03-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Consider KILLGT as an ALU instruction

Mesa does not override llvm behavior wrt KILLGT anymore so llvm
has to handle KILLGT on its own.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178664 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
08001a5a1565adb8ce18b97537dd75075992d09a 01-Apr-2013 Vincent Lejeune <vljn@ovi.com> R600: Add support for native control flow

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178505 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp