| cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
|
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/Target/X86/X86.h
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/X86/X86.h
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/X86/X86.h
|
| d6ac8e9a03d8fa7115079d86192bc4529e8281aa |
|
25-Apr-2013 |
Preston Gurd <preston.gurd@intel.com> |
This patch adds the X86FixupLEAs pass, which will reduce instruction
latency for certain models of the Intel Atom family, by converting
instructions into their equivalent LEA instructions, when it is both
useful and possible to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| c7b902e7fe3498503efbfd98cabb1b1c67cadda6 |
|
08-Jan-2013 |
Preston Gurd <preston.gurd@intel.com> |
Pad Short Functions for Intel Atom
The current Intel Atom microarchitecture has a feature whereby
when a function returns early then it is slightly faster to execute
a sequence of NOP instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction until
the return address is ready.
When compiling for X86 Atom only, this patch will run a pass,
called "X86PadShortFunction" which will add NOP instructions where less
than four cycles elapse between function entry and return.
It includes tests.
This patch has been updated to address Nadav's review comments
- Optimize only at >= O1 and don't do optimization if -Os is set
- Stores MachineBasicBlock* instead of BBNum
- Uses DenseMap instead of std::map
- Fixes placement of braces
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| aeef83c6afa1e18d1cf9d359cc678ca0ad556175 |
|
07-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Switch TargetTransformInfo from an immutable analysis pass that requires
a TargetMachine to construct (and thus isn't always available), to an
analysis group that supports layered implementations much like
AliasAnalysis does. This is a pretty massive change, with a few parts
that I was unable to easily separate (sorry), so I'll walk through it.
The first step of this conversion was to make TargetTransformInfo an
analysis group, and to sink the nonce implementations in
ScalarTargetTransformInfo and VectorTargetTranformInfo into
a NoTargetTransformInfo pass. This allows other passes to add a hard
requirement on TTI, and assume they will always get at least on
implementation.
The TargetTransformInfo analysis group leverages the delegation chaining
trick that AliasAnalysis uses, where the base class for the analysis
group delegates to the previous analysis *pass*, allowing all but tho
NoFoo analysis passes to only implement the parts of the interfaces they
support. It also introduces a new trick where each pass in the group
retains a pointer to the top-most pass that has been initialized. This
allows passes to implement one API in terms of another API and benefit
when some other pass above them in the stack has more precise results
for the second API.
The second step of this conversion is to create a pass that implements
the TargetTransformInfo analysis using the target-independent
abstractions in the code generator. This replaces the
ScalarTargetTransformImpl and VectorTargetTransformImpl classes in
lib/Target with a single pass in lib/CodeGen called
BasicTargetTransformInfo. This class actually provides most of the TTI
functionality, basing it upon the TargetLowering abstraction and other
information in the target independent code generator.
The third step of the conversion adds support to all TargetMachines to
register custom analysis passes. This allows building those passes with
access to TargetLowering or other target-specific classes, and it also
allows each target to customize the set of analysis passes desired in
the pass manager. The baseline LLVMTargetMachine implements this
interface to add the BasicTTI pass to the pass manager, and all of the
tools that want to support target-aware TTI passes call this routine on
whatever target machine they end up with to add the appropriate passes.
The fourth step of the conversion created target-specific TTI analysis
passes for the X86 and ARM backends. These passes contain the custom
logic that was previously in their extensions of the
ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces.
I separated them into their own file, as now all of the interface bits
are private and they just expose a function to create the pass itself.
Then I extended these target machines to set up a custom set of analysis
passes, first adding BasicTTI as a fallback, and then adding their
customized TTI implementations.
The fourth step required logic that was shared between the target
independent layer and the specific targets to move to a different
interface, as they no longer derive from each other. As a consequence,
a helper functions were added to TargetLowering representing the common
logic needed both in the target implementation and the codegen
implementation of the TTI pass. While technically this is the only
change that could have been committed separately, it would have been
a nightmare to extract.
The final step of the conversion was just to delete all the old
boilerplate. This got rid of the ScalarTargetTransformInfo and
VectorTargetTransformInfo classes, all of the support in all of the
targets for producing instances of them, and all of the support in the
tools for manually constructing a pass based around them.
Now that TTI is a relatively normal analysis group, two things become
straightforward. First, we can sink it into lib/Analysis which is a more
natural layer for it to live. Second, clients of this interface can
depend on it *always* being available which will simplify their code and
behavior. These (and other) simplifications will follow in subsequent
commits, this one is clearly big enough.
Finally, I'm very aware that much of the comments and documentation
needs to be updated. As soon as I had this working, and plausibly well
commented, I wanted to get it committed and in front of the build bots.
I'll be doing a few passes over documentation later if it sticks.
Commits to update DragonEgg and Clang will be made presently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 5d1f5c17377e56d88a525cf82d02e6e5df254580 |
|
05-Jan-2013 |
Nadav Rotem <nrotem@apple.com> |
Revert revision 171524. Original message:
URL: http://llvm.org/viewvc/llvm-project?rev=171524&view=rev
Log:
The current Intel Atom microarchitecture has a feature whereby when a function
returns early then it is slightly faster to execute a sequence of NOP
instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction
until the return address is ready.
When compiling for X86 Atom only, this patch will run a pass, called
"X86PadShortFunction" which will add NOP instructions where less than four
cycles elapse between function entry and return.
It includes tests.
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| dd30b471750aca5c652873f9a8972df162b7e5eb |
|
04-Jan-2013 |
Preston Gurd <preston.gurd@intel.com> |
The current Intel Atom microarchitecture has a feature whereby when a function
returns early then it is slightly faster to execute a sequence of NOP
instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction
until the return address is ready.
When compiling for X86 Atom only, this patch will run a pass, called
"X86PadShortFunction" which will add NOP instructions where less than four
cycles elapse between function entry and return.
It includes tests.
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 1243922fc1a1e3d2681ed9e78503eeabd875ba93 |
|
26-Nov-2012 |
Chad Rosier <mcrosier@apple.com> |
Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.
This pass was conservative in that it always reserved the FP to enable dynamic
stack realignment, which allowed the RA to use aligned spills for vector
registers. This happens even when spills were not necessary. The RA has
since been improved to use unaligned spills when necessary.
The new behavior is to realign the stack if the frame pointer was already
reserved for some other reason, but don't reserve the frame pointer just
because a function contains vector virtual registers.
Part of rdar://12719844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168627 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| a20e1e7ef596842127794372244fd5c646f71296 |
|
01-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
Whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| f0234fcbc9be9798c10dedc3e3c134b7afbc6511 |
|
01-Jun-2012 |
Hans Wennborg <hans@hanshq.net> |
Implement the local-dynamic TLS model for x86 (PR3985)
This implements codegen support for accesses to thread-local variables
using the local-dynamic model, and adds a clean-up pass so that the base
address for the TLS block can be re-used between local-dynamic access on
an execution path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 79aa3417eb6f58d668aadfedf075240a41d35a26 |
|
17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| df4b35e3dd85fead444e23b477d61dfd43e1fb6f |
|
28-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove X86-dependent stuff from SSEDomainFix.
This also enables domain swizzling for AVX code which required a few
trivial test changes.
The pass will be moved to lib/CodeGen shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 3bde6fe0df05558b89e7edfe48ac05da59beb81a |
|
23-Aug-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Introduce a pass to insert vzeroupper instructions to avoid AVX to
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 54134708f5debe1631f9ea9b232f78758a2151e4 |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| a87e40f16f1c3117412e01107807e490d6fb29bc |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
More refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 8c3fee59038d8fd98db2a01b6a309a8941a16a3f |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Refactor X86 target to separate MC code from Target code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 59ee62d2418df8db499eca1ae17f5900dc2dcbba |
|
11-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
MCSubtargetInfo so MC code emitter can do the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| ed5e3552147830159a1d48d067dfbb49ac9cccfd |
|
07-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename files for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 22fee2dff4c43b551aefa44a96ca74fcade6bfac |
|
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 46af0d73412aa566745e8c6808c299f0c6f3b245 |
|
25-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetDesc to MCTargetDesc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| a347f85dbeee37a7f2bb68df1a7d4cdfbb7b576d |
|
24-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Starting to refactor Target to separate out code that's needed to fully describe
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.
First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 67e0c212c25f478e4c2ac6c8e9c50cce028fb79c |
|
20-Dec-2010 |
Daniel Dunbar <daniel@zuster.org> |
Add header...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122247 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 9b2f25e3132524166d7669d52fffd6c6b6eaaf44 |
|
20-Dec-2010 |
Daniel Dunbar <daniel@zuster.org> |
X86/MC/Mach-O: Split out createX86MachObjectWriter().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 468a2a44e2a2efb5a2cd441205fc78b80edd3844 |
|
16-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill
pass that inserted it.
It is no longer necessary to limit the live ranges of FP registers to a single
basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108536 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 84023e0fbefc406a4c611d3d64a10df5d3a97dd7 |
|
10-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| fa85eb62378900a884a7eb4933a9deb6513d26ab |
|
06-Apr-2010 |
Jim Grosbach <grosbach@apple.com> |
Fix PR6696 and PR6663
When a frame pointer is not otherwise required, and dynamic stack alignment
is necessary solely due to the spilling of a register with larger alignment
requirements than the default stack alignment, the frame pointer can be both
used as a general purpose register and a frame pointer. That goes poorly, for
obvious reasons. This patch brings back a bit of old logic for identifying
the use of such registers and conservatively reserves the frame pointer
during register allocation in such cases.
For now, implement for X86 only since it's 32-bit linux which is hitting this,
and we want a targeted fix for 2.7. As a follow-on, this will be expanded
to handle other targets, as theoretically the problem could arise elsewhere
as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 352aa503faee6c58e9cdb5054cc5ec1d90c696b4 |
|
25-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings.
On Nehalem and newer CPUs there is a 2 cycle latency penalty on using a register
in a different domain than where it was defined. Some instructions have
equvivalents for different domains, like por/orps/orpd.
The SSEDomainFix pass tries to minimize the number of domain crossings by
changing between equvivalent opcodes where possible.
This is a work in progress, in particular the pass doesn't do anything yet. SSE
instructions are tagged with their execution domain in TableGen using the last
two bits of TSFlags. Note that not all instructions are tagged correctly. Life
just isn't that simple.
The SSE execution domain issue is very similar to the ARM NEON/VFP pipeline
issue handled by NEONMoveFixPass. This pass may become target independent to
handle both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| fe4b92baf11785bf0bfc26b256ca841c9848f77a |
|
24-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings."
This reverts commit 99345. It was breaking buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99352 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| c75c5fa12582956fc6b7d7d756b2bdd49fa61f71 |
|
24-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings.
This is work in progress. So far, SSE execution domain tables are added to
X86InstrInfo, and a skeleton pass is enabled with -sse-domain-fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 6c27f5e5743481c6a519c60135cf85ac238c150a |
|
11-Mar-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC: Provide the target triple to AsmBackend constructors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98220 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 12783d1c3a86d1b5287b0703db6893ae1f283877 |
|
21-Feb-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/X86: Add stub AsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| f068304b1f9205b49aa4bef75e669f750906b84f |
|
13-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
rip out the 'heinous' x86 MCCodeEmitter implementation.
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 86020e46289643de2f8c7603b550ffc8b6aff376 |
|
13-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
give MCCodeEmitters access to the current MCContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96038 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 00cb3fe786855ce6545234bc3430223eb9272206 |
|
05-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
wire up 64-bit MCCodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 457624792803e26136889b8cf17e8aa7b84e58b4 |
|
03-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
stub out a new X86 encoder, which can be tried with
-enable-new-x86-encoder until its stable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| ce79a25980da3279f05adf324d9d6adefb9c979c |
|
03-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
rename createX86MCCodeEmitter to more accurately reflect what it creates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 7f89fdae34a11f8b0b3e0ee1de3f2f6d317f38c4 |
|
02-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95144 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| e27d205d5d4d53cceabcd6325533fbdf9c0cee42 |
|
02-Dec-2009 |
Jim Grosbach <grosbach@apple.com> |
Factor the stack alignment calculations out into a target independent pass.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 7168a7dc6dd3b6a502372f34c2ed4ed91c85c090 |
|
27-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
llvm-mc/X86: Implement single instruction encoding interface for MC.
- Note, this is a gigantic hack, with the sole purpose of unblocking further
work on the assembler (its also possible to test the mathcer more completely
now).
- Despite being a hack, its actually good enough to work over all of 403.gcc
(although some encodings are probably incorrect). This is a testament to the
beauty of X86's MachineInstr, no doubt! ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80234 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 0c795d61878156817cedbac51ec2921f2634c1a5 |
|
25-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Add new helpers for registering targets.
- Less boilerplate == good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 4cb1e13769856716261a4d315f8202bd918502c3 |
|
19-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Put Target definitions inside Target specific header, and llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 51b198af83cb0080c2709b04c129a3d774c07765 |
|
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Reapply TargetRegistry refactoring commits.
--- Reverse-merging r75799 into '.':
U test/Analysis/PointerTracking
U include/llvm/Target/TargetMachineRegistry.h
U include/llvm/Target/TargetMachine.h
U include/llvm/Target/TargetRegistry.h
U include/llvm/Target/TargetSelect.h
U tools/lto/LTOCodeGenerator.cpp
U tools/lto/LTOModule.cpp
U tools/llc/llc.cpp
U lib/Target/PowerPC/PPCTargetMachine.h
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCTargetMachine.cpp
U lib/Target/PowerPC/PPC.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/ARMTargetMachine.h
U lib/Target/ARM/ARM.h
U lib/Target/XCore/XCoreTargetMachine.cpp
U lib/Target/XCore/XCoreTargetMachine.h
U lib/Target/PIC16/PIC16TargetMachine.cpp
U lib/Target/PIC16/PIC16TargetMachine.h
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/Alpha/AlphaTargetMachine.cpp
U lib/Target/Alpha/AlphaTargetMachine.h
U lib/Target/X86/X86TargetMachine.h
U lib/Target/X86/X86.h
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.h
U lib/Target/CppBackend/CPPTargetMachine.h
U lib/Target/CppBackend/CPPBackend.cpp
U lib/Target/CBackend/CTargetMachine.h
U lib/Target/CBackend/CBackend.cpp
U lib/Target/TargetMachine.cpp
U lib/Target/IA64/IA64TargetMachine.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/IA64/IA64TargetMachine.h
U lib/Target/IA64/IA64.h
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/CellSPU/SPUTargetMachine.h
U lib/Target/CellSPU/SPU.h
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/CellSPU/SPUTargetMachine.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U lib/Target/Mips/MipsTargetMachine.cpp
U lib/Target/Mips/MipsTargetMachine.h
U lib/Target/Mips/Mips.h
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Sparc/SparcTargetMachine.cpp
U lib/Target/Sparc/SparcTargetMachine.h
U lib/ExecutionEngine/JIT/TargetSelect.cpp
U lib/Support/TargetRegistry.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 2286f8dc4cec0625f7d7a14e2570926cf8599646 |
|
15-Jul-2009 |
Stuart Hastings <stuart@apple.com> |
Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 4246790aa84a530b0378d917023584c2c7adb4a9 |
|
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Register Target's TargetMachine and AsmPrinter in the new registry.
- This abuses TargetMachineRegistry's constructor for now, this will get
cleaned up in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 71847813bc419f7a0667468136a07429c6d9f164 |
|
14-Jul-2009 |
David Greene <greened@obbligato.org> |
Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| ac57e6e498abccb117e0d61c2fa0f733845e50cb |
|
06-Jul-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 5bcc8bd0c60cfe583ee47852950aad9e532c932e |
|
01-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
happened that caused this variable to become unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 434dd4fd94f5f248492c675e4285e7d67342d4c4 |
|
01-Jun-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| a3f99f90338d89354384ca25f53ca4450a1a9d18 |
|
30-May-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 98a366d547772010e94609e4584489b3e5ce0043 |
|
30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b |
|
29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| c69d56f1154342a57c9bdd4c17a10333e3520127 |
|
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 2e9d5f912a9841d3685ba0241abe1131943fed29 |
|
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 42bf74be1402df7409efbea089310d4c276fde37 |
|
25-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 57f0db833dc30404f1f5d28b23df326e520698ec |
|
24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.
- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.
- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| d68a07650cdb2e18f18f362ba533459aa10e01b6 |
|
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Tidy up #includes, deleting a bunch of unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| bc5cbb8be9d935240be5a57a8f37c5258a9d0563 |
|
12-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that inserts X87 FP_REG_KILL instructions from a
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59190 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| cb3718832375a581c5ea23f15918f3ea447a446c |
|
21-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use raw_ostream throughout the AsmPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 856914fe0084278d11edec79c8b707a6276b8857 |
|
23-Apr-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add X86 Maximal Stack Alignment Calculator Pass before RA
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50166 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| bfae83139dcb4fffd50b939e1b1224b0126f04d4 |
|
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 4ee451de366474b9c228b4e5fa573795a715216d |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| eb1ac3385096dd6f45a1548f3492f21648f55b4c |
|
08-Feb-2007 |
Bill Wendling <isanbard@gmail.com> |
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| d6842e4e1805feaaf865a7b6bf59b35e4c5e0759 |
|
15-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Remove unneeded forward decls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 1911fd4f85aebcd4d7b8f27313c5a363eebf49cb |
|
04-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Completely rearchitect the interface between targets and the pass manager.
This pass:
1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
output, move all this to common code, and give targets hooks they can
implement.
3. Commonalize the target population stuff between file emission and JIT
emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
paves the way for "fast -O0" stuff in the CFE later, and now LLC could
lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
which is now orthogonal to the fact that JIT'ing is being done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| e50794adda9256d6fe2f378c01ee3c44e1fbd86c |
|
29-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Enable x86 isel preprocessing by default unless -fast is specified.
- Also disable isel load folding if -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 55fc28076fa48723bd170e51638b3b5974ca0fa1 |
|
25-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Refactor the code that resolve basic block references to a TargetJITInfo
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| c4c6257c1a154279bf10e9498d46d6c1793dbaa7 |
|
14-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 4c5dcf54ff927d377655d673ac5d560b39008e37 |
|
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Kill the x86 pattern isel. boom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 299f9bab47d53ca79be5c9ed53f22fd5846b9cd6 |
|
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
obsolete. yaay :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 8e44f0756ffdcba4aeddee00dd643b3839acd434 |
|
27-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bye bye Pattern ISel, hello DAG ISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 559806f575297866609c7bef0e5c1084dcdda9a5 |
|
27-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
x86 CPU detection and proper subtarget support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 97c7fc351e4dd73041bc7e47c8a144216a50a648 |
|
26-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added preliminary x86 subtarget support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25645 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 56323c761a73c5b227dc89085e1350c43f7bfb2f |
|
17-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Only lower SELECT when using DAG based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| a763969837e708c7a169a1ea91a9168d040d79eb |
|
12-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove some never-completed and now-obsolete code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| dbdbf0ce2eef7b6585397121f56d3845e04866d1 |
|
15-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
contributed by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 73bfa7152481620d60bf63d5397dfe35bbc9c098 |
|
19-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove the X86 and PowerPC Simple instruction selectors; their time has
passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 81b6ed7ed1dbf1e5cc001aaff2dee5bdd8d1122e |
|
11-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor things a bit to allow the ELF code emitter to run the X86 machine code emitter
after itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| efb4bf0de664f47b53e70ec4a3f9aec8dea14aaf |
|
11-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Remove prototype for non-existant function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| f63be7d3959939b2ffaf0bba5519b71216ec9ee6 |
|
06-Jul-2005 |
Nate Begeman <natebegeman@mac.com> |
First round of support for doing scalar FP using the SSE2 ISA extension and
XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 07a9144efea7e870c53552d73dc078de8a3d0731 |
|
27-Jun-2005 |
Chris Lattner <sabre@nondot.org> |
Add support to the X86 backend for emitting ELF files. To use this, we
currently use: llc t.bc --filetype=obj
This will produce a t.o file which is dumpable with readelf. Currently
the file produced is empty, but the scaffolding to do more is now in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 0e0a7a45d3d0a8c865a078459d2e1c6d8967a100 |
|
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
* Remove trailing whitespace
* Convert tabs to spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 95cdb36714f730a1d62b69ed45a16738d5d5860a |
|
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19332 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 6f0161aac396de29d5a296f8b0ee81827b7e0a9c |
|
24-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Add -sse[,2,3] arguments to LLC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| f60b91cbe333963c4a077972b3491429815314ee |
|
16-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Disable the pattern isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| cc46c4fceeef4d5a359a1188b737689a69f5be5f |
|
22-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Remove some (LARGE) abandoned code for the release. If this is ever needed
again in the future, it can be resurrected out of CVS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15112 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 0a8fd30c1bb4f324a9bca9b7b7c0efb0fa341112 |
|
06-Apr-2004 |
Jakub Staszak <kuba@gcc.gnu.org> |
Tablgen files for really simple instruction selector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| f70e0c216c074bd2ae2b08178f5512849545db4e |
|
28-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
implementation from the TargetMachine directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 4482715f3d1c165be82bd5aed07231f956e472ef |
|
28-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
implement support for the intrinsic lowering functionality
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10629 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 359b65f782cc323daba4f8c5c21c70a98c9d40ea |
|
13-Dec-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Add a floating point killer pass. This pass runs before register
allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 9b527704f75d1ae15b9c290090c8991171a13af1 |
|
01-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
Add an option to enable the SSA based peephole optimizer.
Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| d0fde30ce850b78371fd1386338350591f9ff494 |
|
11-Nov-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Put all LLVM code into the llvm namespace, as per bug 109.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 856ba76200ec2302f2fe500bc507f426c7d566c8 |
|
21-Oct-2003 |
John Criswell <criswell@uiuc.edu> |
Added LLVM copyright header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9321 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 9826bdb7d829b2e48669a3ab69b0e6286f524001 |
|
13-Aug-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Factory methods for FunctionPasses now return type FunctionPass *.
Correct one of the functions' comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| ac0c8680ad53c08189c23f39c79a2147378692df |
|
11-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Add support for a pattern matching instruction selector. This is still in
the early implementation phases, so it is disabled by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 8d44ba8c5c2d66425caecb679727fe109d7e578d |
|
03-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Start using tablegen'd instruction enum list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 832003578edcf93c9ad6869ee40c70c3ce89f415 |
|
03-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Switch over to tablegen generated header files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7512 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| d281de21815d4766cf4960ad2ef075bee3beac0b |
|
27-Jul-2003 |
Chris Lattner <sabre@nondot.org> |
Rename function to be more consistent with filename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7352 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| de420aee32ea799eada24afb59857040172c75d1 |
|
23-Jul-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
Printer::doFinalization() out in the cold. Now we pass in a TargetMachine
to Printer's constructor and get the TargetData from the TargetMachine.
Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| ff3261ae865e7b9d500b2a6739396dcf8a8af0e0 |
|
03-Jun-2003 |
Chris Lattner <sabre@nondot.org> |
Add namespace comments for doxygen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6581 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 31ad5dd67feb7c4324c993ae30590ddb6c9701d2 |
|
13-Jan-2003 |
Chris Lattner <sabre@nondot.org> |
Move passes out to Passes.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5227 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| f2ab4124e39b6427054bc149475262bd9a110431 |
|
28-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
* Most pass ctor functions don't take TM arguments anymore
* New createPrologEpilogCodeInserter() function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5181 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 92aec04cd64836449c788dadc40e0d98a9fce482 |
|
16-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Try #2 to get alias set stuff to work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5077 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| c2fc7ea60b5e11bb0e51a7fb578a1f098651e33f |
|
16-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Add info about register aliases, add prototype for createLocalRegisterAllocator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 1a45626c4c9cef2a8faafd58119d5648d85db8ac |
|
16-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 4ce42a776a98ec0cc8583ce8552eddbf835eb06e |
|
03-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
* Move information about Implicit Defs/Uses into X86InstrInfo.def.
* Expose information about implicit defs/uses of register through the
MachineInstrInfo.h file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 6aab9cf65cd1e96f9d0fa99f8453da454648bba1 |
|
18-Nov-2002 |
Chris Lattner <sabre@nondot.org> |
Start to add more information to instr.def
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| b4f68ed32ede4cf7d31ce9e516e4074dad0a24ee |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Convert backend to use passes, implement X86TargetMachine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 055c965bff7c8567e7fae90ffe1e10e109856064 |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Rename X86InstructionInfo to X86InstrInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4413 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| a535fabe7d81f95cf0caebefee1ed44e40eebd7f |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Be compatible with sparc backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4395 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 75276f150e081464300810c58934abcc9c4b9f53 |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Initial stab at MachineInstr'ication
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|
| 726140821f96e3472a8eccef0c67c0b5ad65a1d9 |
|
26-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Initial checkin of X86 backend.
We can instruction select exactly one instruction 'ret void'. Wow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86.h
|