History log of /external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
4a971705bc6030dc2e4338b3cd5cffa2e0f88b7b 13-May-2013 Rafael Espindola <rafael.espindola@gmail.com> Remove the MachineMove class.

It was just a less powerful and more confusing version of
MCCFIInstruction. A side effect is that, since MCCFIInstruction uses
dwarf register numbers, calls to getDwarfRegNum are pushed out, which
should allow further simplifications.

I left the MachineModuleInfo::addFrameMove interface unchanged since
this patch was already fairly big.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181680 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
6e53180db120b30f600ac31611a9dd47ef7f4921 10-May-2013 Rafael Espindola <rafael.espindola@gmail.com> Remove unused argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181618 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
0c66f30325848014eda3203da5fae4c2e71a2884 04-May-2013 Richard Osborne <richard@xmos.com> [XCore] Use static relocation model by default.

This allows us to get get rid of a hack in XCoreTargetObjectFile where the
the DataRel* sections were overridden.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
58a2cbef4aac9ee7d530dfb690c78d6fc11a2371 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Resort the #include lines in include/... and lib/... with the
utils/sort_includes.py script.

Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the
includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
9578d793c9450b315721d5cb15001c2e69bff3d0 16-Dec-2012 Richard Osborne <richard@xmos.com> Change XCoreAsmPrinter to lower MachineInstrs to MCInsts before emission.

This change adds XCoreMCInstLower to do the lowering to MCInst and
XCoreInstPrinter to print the MCInsts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
31d157ae1ac2cd9c787dc3c1d28e64c682803844 18-Feb-2012 Jia Liu <proljc@gmail.com> Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
655b8de7b2ab773a977e0c524307e71354d8af29 05-Feb-2012 Craig Topper <craig.topper@gmail.com> Convert assert(0) to llvm_unreachable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
b95fc31aa2e5a0a0b9ee1909d1cb949577c5aa16 16-Nov-2011 Evan Cheng <evan.cheng@apple.com> Sink codegen optimization level into MCCodeGenInfo along side relocation model
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 24-Aug-2011 Evan Cheng <evan.cheng@apple.com> Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
7801136b95d1fbe515b9655b73ada39b05a33559 23-Aug-2011 Evan Cheng <evan.cheng@apple.com> Some refactoring so TargetRegistry.h no longer has to include any files
from MC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
7f8dff65717b1e4090ba4a648f9ec4f037a66c1e 23-Jul-2011 Evan Cheng <evan.cheng@apple.com> createXXXMCCodeGenInfo should be static.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135826 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
e78085a3c03de648a481e9751c3094c517bd7123 22-Jul-2011 Evan Cheng <evan.cheng@apple.com> Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo,
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135812 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
34ad6db8b958fdc0d38e122edf753b5326e69b03 20-Jul-2011 Evan Cheng <evan.cheng@apple.com> - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
439661395fd2a2a832dba01c65bc88718528313c 19-Jul-2011 Evan Cheng <evan.cheng@apple.com> Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
2d28617de2b0b731c08d1af9e830f31e14ac75b4 19-Jul-2011 Evan Cheng <evan.cheng@apple.com> Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for
better location welcome).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
0e6a052331f674dd70e28af41f654a7874405eab 18-Jul-2011 Evan Cheng <evan.cheng@apple.com> Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down
to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
1abf2cb59b8d63415780a03329307c0997b2670c 15-Jul-2011 Evan Cheng <evan.cheng@apple.com> Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
c60f9b752381baa6c4b80c0739034660f1748c84 14-Jul-2011 Evan Cheng <evan.cheng@apple.com> Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp