| 38a20281fcc2ed244aea0aaa268035533f48a183 |
|
05-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: fix lowering of textureGrad
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| 00fe442253744c4c4e7e68da44d6983da053968b |
|
29-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: implement better placement of texture barriers
Put them before first uses instead of right after the texturing
instruction and cull unnecessary barriers.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
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| f4dbdcbfcf7370deeb5dcccec2e8d1c471d66517 |
|
27-Dec-2011 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/ra: Fix live set propagation in the secondary passes of buildLiveSets().
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| e43a3a66a9d8a99021d76ff4d07dec7b8cfd62ca |
|
09-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: rewrite the register allocator as GCRA, with spilling
This is more flexible than the linear scan, and we don't need the
separate allocation pass for constrained values anymore.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| a5397851870d3a9969b2b864c849ba209ef9b0f7 |
|
15-Nov-2011 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/ra: Allocate registers for function arguments.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| 530ff61ba77f940f6f4093956b99221ab62ab430 |
|
06-Apr-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir: Take into account function args in the live range calculation code.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| ed255dbae2ada50cbdb71f6b03f4e42d3ed7ebc6 |
|
29-Mar-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/ra: Use matching physical regs for function args in caller and callee.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| d32ebb8c304725fa6bb7ec2d3d40ce828c713917 |
|
09-Apr-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir: Scan program functions in DFS-postorder.
The reason is that several passes (regalloc, function argument
binding, inlining) are going to require the callees of a function to
be processed before the caller.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| 9362d4bc0a03860ec386156cf499e855a9c2d2a5 |
|
09-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: make Instruction::src/def container private
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| 8cc2eca5df0116aa7fb8233a9ab6ad1c9e4203cd |
|
29-Mar-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir: Add support for unlimited instruction arguments.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| 4021979182d3a6eb2bed1e9d784e218eb88bfa28 |
|
07-Jan-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/ra: don't coalesce contraint-moves
This could lead to incorrect code when fixed regs are involved.
Surprisingly, the increased freedom actually leads to lower
register usage in some cases. Still want to find a better way
to treat constraints though ...
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| 9c930639d9f6d713ccfd16b390a41a9f584f348c |
|
11-Oct-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: fix textureGrad with offsets and in non-FPs
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| d2d19ea51fa3575a8d014a69a9b835c335728817 |
|
14-Sep-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: add missing license headers
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|
| 57594065c30feec9376be9b2132659f7d87362ee |
|
14-Sep-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: import new shader backend code
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_ra.cpp
|