| 6657678c3d86395084f6a699e73614195f06c445 |
|
24-Mar-2014 |
David 'Digit' Turner <digit@google.com> |
Introduce CPUState.
This patch splits the definitions previously found in CPUArchState,
to place some of them in a common data structure called CPUState,
to mirror upstream.
Note that upstream also makes CPUState a complete QOM object that
derives from DeviceState / DeviceClass, but this patch doesn't do
that. That's why the target-*/cpu-qom.h files, as well as
include/qom/cpu.h are not the real ones from upstream yet.
Future patches will get rid of CPUOldState, which is currently used
as an alias for CPUArchState, but will be replaced entirely by
CPUState, requiring changing the signature of many functions to
match upstream.
QOM-ification will probably happen after that, but may require
a few more patches due to layering / coupling issues.
Change-Id: Ifc33f8abe2aa80b20da13f5c83c109e37aff7e11
Conflicts:
cputlb.c
target-arm/op_helper.c
target-i386/op_helper.c
target-mips/op_helper.c
/external/qemu/target-mips/cpu.h
|
| 758fa08712c9b1075c49adf86fd0a24c8fdb30ec |
|
03-Apr-2014 |
David 'Digit' Turner <digit@google.com> |
target-mips: Pass env to TLB helpers
Change-Id: Iea68dbfa2dfc4ff72d21f4bb71775229e2ed3f8f
/external/qemu/target-mips/cpu.h
|
| 0d8b235c0c6c02de86a4e7415d574175b4518ff0 |
|
20-Mar-2014 |
David 'Digit' Turner <digit@google.com> |
Large page TLB flush
+ Remove unused is_softmmu parameter.
Upstream d4c430a80f000d722bb70287af4d4c184a8d7006
Upstream 97b348e7d221c94ddde609346407bd2cd6f85044
Change-Id: I7ccc6a8ffc040f91a58a3206d95417d22001b67b
/external/qemu/target-mips/cpu.h
|
| 93949dc9a6f5a702db214d19080397a9e94b45f6 |
|
18-Mar-2014 |
David 'Digit' Turner <digit@google.com> |
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Upstream f081c76ccfdbc1fdaa90fa5eb6abad46c1b5bfa8
Change-Id: I6f871f67404e13ba0c5070370542c0166814da02
/external/qemu/target-mips/cpu.h
|
| 6cf763a179bb432ef845025bb3639fcaf1251bd0 |
|
14-Mar-2014 |
David 'Digit' Turner <digit@google.com> |
Fix unassigned memory access handling
Upstream b14ef7c9ab41ea824c3ccadb070ad95567cca84e
Change-Id: Ia198f76ad4277469a96eb79cf495e80f9d4b6196
/external/qemu/target-mips/cpu.h
|
| e2678e116c8cdb0f36b247a5bd9cfacc849362fc |
|
16-Jan-2014 |
David 'Digit' Turner <digit@android.com> |
Rename CPUState to CPUOldState.
Upstream qemu has split the cpu state into two new data structures:
CPUState -> is used to model the CPU state through the QEMU
object model.
CPUArchState -> actually a macro that aliases CPUArmState,
CPUX86State or CPUMIPSState.
Both were part of the "CPUState" in the current emulator sources.
Previous patches introduced CPUArchState, as a simple alias to the
machine-specific state. This patch renames any use of CPUState in
the current code to CPUOldState, except within target-*/ directories
where it is replaced by CPU${ARCH}State instead.
This will allow bringing the upstream CPUState definition in the
source tree, and slowly migrate everything to the right location.
Change-Id: I88b79e6e89f1f36084dc2642e1cf415135e4da09
/external/qemu/target-mips/cpu.h
|
| 26a8fb6421ab91cfdecdbee299e5e28918c4f0d4 |
|
15-Jan-2014 |
David 'Digit' Turner <digit@android.com> |
target-i386/mips: Minor updates from upstream.
Does not change the behaviour, just introduces new constants/types
and define CPUArchState everywhere now.
Change-Id: I2caac85f0597360195b6b0b54788ab84a40ddb6a
/external/qemu/target-mips/cpu.h
|
| bcde1092aca184dbd7860078af020de7d1e4e22f |
|
09-Jan-2014 |
David 'Digit' Turner <digit@android.com> |
rename target_phy_addr_t to hwaddr to match upstream.
Upstream got rid of the target_phys_addr_t and replaced it with 'hwaddr',
so do the corresponding rename here. Note that:
- This also renames <exec/targphys.h> to <exec/hwaddr.h>
- Upstream always deins hwaddr as a 64-bit type, while the size of
our own hwaddr is still controlled by TARGET_PHYS_ADDR_BITS, and
will be 32 for now.
A future patch will change the type definition to fully match
upstream, but it is more risky / requires more cleanups. It's
simply cleaner / simpler to put the related work in a separate
patch, given the large number of sources touched by the
current change.
Change-Id: Iee30869a57798c12109b6a23570b166232bb9244
/external/qemu/target-mips/cpu.h
|
| 5425d40d2955e859097ded7a04913c3e7ee1a7b6 |
|
15-Dec-2013 |
David 'Digit' Turner <digit@android.com> |
Move fpu/softfloat.h -> include/fpu/
Change-Id: I0d15a547dff8b421cdb633ecf939f954a4727631
/external/qemu/target-mips/cpu.h
|
| 852088c7e08182c2de563872d558309815cbfa0d |
|
14-Dec-2013 |
David 'Digit' Turner <digit@android.com> |
Move headers to include/exec/
Change-Id: Ife43f9cd12a02aa98f408043b0cccb9fe45a9ff7
/external/qemu/target-mips/cpu.h
|
| 55ff318b4e5382074e2049c996cb6df1041aff1b |
|
03-Aug-2012 |
Chris Dearman <chris@mips.com> |
[MIPS] Speed up software refill handler
Emulating each instruction of the software refill handler
has a significant impact on the overall performance of QEMU because
of the overhead of emulating the various CP0 instructions to accurately
reflect the machine state. Running the software TLB handler takes
the equivalent of 1000's of machine cycles.
This patch implements a pseudo hardware TLB refill handler
that significantly reduces the impact of refilling the TLB
to bring it more inline with what would be observed on a real target.
Signed-off-by: Steven Hill <sjhill@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Yajin <yajin@mips.com.cn>
/external/qemu/target-mips/cpu.h
|
| 741dc13597ac064e6a48bb2a6ec069cbc1cd0dbb |
|
09-May-2012 |
Bhanu Chetlapalli <bhanu@mips.com> |
[MIPS] Add Goldfish target support
Basic Goldfish support for MIPS.
Also, Fix host CPU consumption when guest is idle
When the CPU is in wait state, do not wake-up if an interrupt can't be
taken. This avoid host CPU running at 100% if a device (e.g. timer) has
an interrupt line left enabled.
Also factorize code to check if interrupts are enabled in
cpu_mips_hw_interrupts_pending().
CPU consumption based on a patch from
Edgar E. Iglesias <edgar.iglesias@gmail.com>
Change-Id: Ie8371c8d0c9af1e0c8ba4cac419979350de0f5d9
Signed-off-by: yajin <yajin@mips.com.cm>
Signed-off-by: Douglas Leung <douglas@mips.com>
Signed-off-by: Bhanu Chetlapalli <bhanu@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
/external/qemu/target-mips/cpu.h
|
| 325e19d19ff9e1fc9c6acb12eeb754563fc2e251 |
|
01-Feb-2012 |
Bhanu Chetlapalli <bhanu@mips.com> |
[MIPS] Tweak MIPS support to work in Android qemu framework
Change-Id: Icd617cb91fe87a6f88566dd57b6405b216ca3570
Signed-off-by: Chris Dearman <chris@mips.com>
/external/qemu/target-mips/cpu.h
|
| 409c7b66435cf5947cab6bf0710f92507317f22e |
|
01-Feb-2012 |
Bhanu Chetlapalli <bhanu@mips.com> |
[MIPS] Import MIPS target support
From v0.12.5 tag at git://git.sv.gnu.org/qemu.git
CommitID: 174f225e9d62e8f3002e274e4f718bd2a967fbf4
Change-Id: I35b49a4319cee4b69cf9da4e5af1f43327e21056
Signed-off-by: Chris Dearman <chris@mips.com>
/external/qemu/target-mips/cpu.h
|
| 55f4e4a5ec657a017e3bf75299ad71fd1c968dd3 |
|
21-Oct-2008 |
The Android Open Source Project <initial-contribution@android.com> |
Initial Contribution
/external/qemu/target-mips/cpu.h
|
| 413f05aaf54fa08c0ae7e997327a4f4a473c0a8d |
|
12-Jan-1970 |
Upstream <upstream-import@none> |
external/qemu 0.8.2
/external/qemu/target-mips/cpu.h
|