Lines Matching refs:class_reg
1091 RegStorage class_reg = TargetReg(kArg2, kRef); // kArg2 will hold the Class*
1098 OpRegCopy(class_reg, ret_reg); // Align usage with fast path
1103 class_reg, kNotVolatile);
1110 // Load dex cache entry into class_reg (kArg2)
1112 class_reg, kNotVolatile);
1114 LoadRefDisp(class_reg, offset_of_type, class_reg, kNotVolatile);
1116 LIR* slow_path_branch = OpCmpImmBranch(kCondEq, class_reg, 0, NULL);
1165 GenSelectConst32(ref_class_reg, class_reg, kCondEq, 1, 0, rl_result.reg,
1173 OpRegReg(kOpCmp, ref_class_reg, class_reg); // Same?
1177 OpRegCopy(ref_reg, class_reg); // .ne case - arg0 <= class
1190 OpRegCopy(TargetReg(kArg0, kRef), class_reg); // .ne case - arg0 <= class
1245 RegStorage class_reg = TargetReg(kArg2, kRef); // kArg2 will hold the Class*
1251 OpRegCopy(class_reg, TargetReg(kRet0, kRef)); // Align usage with fast path
1254 class_reg, kNotVolatile);
1256 // Load dex cache entry into class_reg (kArg2)
1258 class_reg, kNotVolatile);
1260 LoadRefDisp(class_reg, offset_of_type, class_reg, kNotVolatile);
1263 LIR* hop_branch = OpCmpImmBranch(kCondEq, class_reg, 0, NULL);
1270 const RegStorage class_reg) :
1272 class_reg_(class_reg) {
1291 AddSlowPath(new (arena_) SlowPath(this, hop_branch, cont, type_idx, class_reg));
1294 // At this point, class_reg (kArg2) has class
1338 LIR* branch2 = OpCmpBranch(kCondNe, TargetReg(kArg1, kRef), class_reg, nullptr);