Lines Matching refs:vld1
611 vld1.s16 {q0}, [r2], r4 ; load data step2[0]
612 vld1.s16 {q1}, [r2], r4 ; load data step2[1]
613 vld1.s16 {q10}, [r2], r4 ; load data step2[2]
614 vld1.s16 {q11}, [r2], r4 ; load data step2[3]
615 vld1.64 {d12}, [r7], r8 ; load destinatoin data
616 vld1.64 {d13}, [r7], r8 ; load destinatoin data
629 vld1.64 {d12}, [r7], r8 ; load destinatoin data
630 vld1.64 {d13}, [r7], r8 ; load destinatoin data
643 vld1.s16 {q0}, [r2], r4 ; load data step2[4]
644 vld1.s16 {q1}, [r2], r4 ; load data step2[5]
645 vld1.s16 {q10}, [r2], r4 ; load data step2[6]
646 vld1.s16 {q11}, [r2], r4 ; load data step2[7]
647 vld1.64 {d12}, [r7], r8 ; load destinatoin data
648 vld1.64 {d13}, [r7], r8 ; load destinatoin data
661 vld1.64 {d12}, [r7], r8 ; load destinatoin data
662 vld1.64 {d13}, [r7], r8 ; load destinatoin data
673 vld1.64 {d12}, [r7], r8 ; load destinatoin data
674 vld1.64 {d13}, [r7], r8 ; load destinatoin data
683 vld1.64 {d12}, [r7], r8 ; load destinatoin data
688 vld1.64 {d13}, [r7], r8 ; load destinatoin data
693 vld1.64 {d12}, [r7], r8 ; load destinatoin data
698 vld1.64 {d13}, [r7], r8 ; load destinatoin data
703 vld1.64 {d12}, [r7], r8 ; load destinatoin data
708 vld1.64 {d13}, [r7], r8 ; load destinatoin data
713 vld1.64 {d12}, [r7], r8 ; load destinatoin data
726 vld1.s16 {q0}, [r2], r4 ; load data step2[0]
727 vld1.s16 {q1}, [r2], r4 ; load data step2[1]
730 vld1.s16 {q10}, [r2], r4 ; load data step2[2]
731 vld1.s16 {q11}, [r2], r4 ; load data step2[3]
746 vld1.s16 {q0}, [r2], r4 ; load data step2[4]
747 vld1.s16 {q1}, [r2], r4 ; load data step2[5]
750 vld1.s16 {q10}, [r2], r4 ; load data step2[6]
751 vld1.s16 {q11}, [r2], r4 ; load data step2[7]
1117 vld1.s16 {q0}, [r2], r4 ; load data step2[0]
1118 vld1.s16 {q1}, [r2], r4 ; load data step2[1]
1121 vld1.s16 {q10}, [r2], r4 ; load data step2[2]
1122 vld1.s16 {q11}, [r2], r4 ; load data step2[3]
1137 vld1.s16 {q0}, [r2], r4 ; load data step2[4]
1138 vld1.s16 {q1}, [r2], r4 ; load data step2[5]
1141 vld1.s16 {q10}, [r2], r4 ; load data step2[6]
1142 vld1.s16 {q11}, [r2], r4 ; load data step2[7]