Lines Matching defs:src2
398 struct src_register src2 )
410 type2 = SVGA3dShaderGetRegType( src2.base.value );
415 (type2 == SVGA3DREG_CONST && src0.base.num != src2.base.num)))
419 (type2 == SVGA3DREG_CONST && src1.base.num != src2.base.num))
425 (type2 == SVGA3DREG_INPUT && src0.base.num != src2.base.num)))
429 (type2 == SVGA3DREG_INPUT && src1.base.num != src2.base.num))
446 if (!emit_op3( emit, inst, dest, src0, src1, src2 ))
468 struct src_register src2,
481 type2 = SVGA3dShaderGetRegType( src2.base.value );
482 type3 = SVGA3dShaderGetRegType( src2.base.value );
492 (type2 == SVGA3DREG_CONST && src0.base.num != src2.base.num)))
496 (type2 == SVGA3DREG_CONST && src3.base.num != src2.base.num))
501 (type2 == SVGA3DREG_INPUT && src0.base.num != src2.base.num)))
505 (type2 == SVGA3DREG_INPUT && src3.base.num != src2.base.num))
522 if (!emit_op4( emit, inst, dest, src0, src1, src2, src3 ))
551 struct src_register src2)
556 /* The dst reg must be a temporary, and not be the same as src0 or src2 */
559 alias_src_dst(src2, dst))
570 if (!submit_op3(emit, inst_token( SVGA3DOP_LRP ), tmp, src0, src1, src2))
1420 const struct src_register src2 =
1427 * src1 or src2 was Inf/NaN. In particular, GLSL sqrt(0) failed
1432 src0, zero, src1, src2);
1439 src0, src2, src1);
2006 const struct src_register src2 = translate_src_register(
2009 return submit_lrp(emit, dst, src0, src1, src2);