Lines Matching refs:i830

80    struct i830_context *i830 = i830_context(ctx);
134 GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] &
163 if (mcs != i830->state.Tex[i][I830_TEXREG_MCS]) {
164 I830_STATECHANGE(i830, I830_UPLOAD_TEX(i));
165 i830->state.Tex[i][I830_TEXREG_MCS] = mcs;
178 if (v0 != i830->state.Ctx[I830_CTXREG_VF] ||
179 v2 != i830->state.Ctx[I830_CTXREG_VF2] ||
180 mcsb1 != i830->state.Ctx[I830_CTXREG_MCSB1] ||
181 index_bitset != i830->last_index_bitset) {
184 I830_STATECHANGE(i830, I830_UPLOAD_CTX);
197 i830->state.Ctx[I830_CTXREG_VF] = v0;
198 i830->state.Ctx[I830_CTXREG_VF2] = v2;
199 i830->state.Ctx[I830_CTXREG_MCSB1] = mcsb1;
200 i830->last_index_bitset = index_bitset;
210 struct i830_context *i830 = i830_context(&intel->ctx);
211 GLuint st1 = i830->state.Stipple[I830_STPREG_ST1];
226 i830->intel.reduced_primitive = rprim;
228 if (st1 != i830->state.Stipple[I830_STPREG_ST1]) {
231 I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
232 i830->state.Stipple[I830_STPREG_ST1] = st1;
242 struct i830_context *i830 = i830_context(&intel->ctx);
243 int vft0 = i830->state.Ctx[I830_CTXREG_VF];
244 int vft1 = i830->state.Ctx[I830_CTXREG_VF2];
419 struct i830_context *i830 = i830_context(&intel->ctx);
420 struct i830_hw_state *state = &i830->state;
464 _mesa_error(ctx, GL_OUT_OF_MEMORY, "i830 emit state");
571 struct i830_context *i830 = i830_context(&intel->ctx);
573 intel_region_release(&i830->state.draw_region);
574 intel_region_release(&i830->state.depth_region);
577 if (i830->state.tex_buffer[i] != NULL) {
578 drm_intel_bo_unreference(i830->state.tex_buffer[i]);
579 i830->state.tex_buffer[i] = NULL;
616 struct i830_context *i830 = i830_context(&intel->ctx);
623 struct i830_hw_state *state = &i830->state;
701 I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
859 struct i830_context *i830 = i830_context(&intel->ctx);
860 i830->state.emitted = 0;
866 struct i830_context *i830 = i830_context(&intel->ctx);
867 assert(!get_dirty(&i830->state));
868 (void) i830;
891 i830InitVtbl(struct i830_context *i830)
893 i830->intel.vtbl.check_vertex_size = i830_check_vertex_size;
894 i830->intel.vtbl.destroy = i830_destroy_context;
895 i830->intel.vtbl.emit_state = i830_emit_state;
896 i830->intel.vtbl.new_batch = i830_new_batch;
897 i830->intel.vtbl.reduced_primitive_state = i830_reduced_primitive_state;
898 i830->intel.vtbl.set_draw_region = i830_set_draw_region;
899 i830->intel.vtbl.update_draw_buffer = i830_update_draw_buffer;
900 i830->intel.vtbl.update_texture_state = i830UpdateTextureState;
901 i830->intel.vtbl.render_start = i830_render_start;
902 i830->intel.vtbl.render_prevalidate = i830_render_prevalidate;
903 i830->intel.vtbl.assert_not_dirty = i830_assert_not_dirty;
904 i830->intel.vtbl.finish_batch = intel_finish_vb;
905 i830->intel.vtbl.invalidate_state = i830_invalidate_state;
906 i830->intel.vtbl.render_target_supported = i830_render_target_supported;
907 i830->intel.vtbl.is_hiz_depth_format = i830_is_hiz_depth_format;