Lines Matching defs:ISD

190       (TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
191 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other));
197 return TLI->isTypeLegal(VT) && TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
294 int ISD = TLI->InstructionOpcodeToISD(Opcode);
295 assert(ISD && "Invalid opcode");
304 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
314 if (!TLI->isOperationExpand(ISD, LT.second)) {
361 int ISD = TLI->InstructionOpcodeToISD(Opcode);
362 assert(ISD && "Invalid opcode");
386 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
397 if (!TLI->isOperationExpand(ISD, DstLT.second))
421 if (!TLI->isOperationExpand(ISD, DstLT.second))
456 int ISD = TLI->InstructionOpcodeToISD(Opcode);
457 assert(ISD && "Invalid opcode");
460 if (ISD == ISD::SELECT) {
463 ISD = ISD::VSELECT;
468 if (!TLI->isOperationExpand(ISD, LT.second)) {
518 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, MemVT.getSimpleVT());
534 unsigned ISD = 0;
555 case Intrinsic::sqrt: ISD = ISD::FSQRT; break;
556 case Intrinsic::sin: ISD = ISD::FSIN; break;
557 case Intrinsic::cos: ISD = ISD::FCOS; break;
558 case Intrinsic::exp: ISD = ISD::FEXP; break;
559 case Intrinsic::exp2: ISD = ISD::FEXP2; break;
560 case Intrinsic::log: ISD = ISD::FLOG; break;
561 case Intrinsic::log10: ISD = ISD::FLOG10; break;
562 case Intrinsic::log2: ISD = ISD::FLOG2; break;
563 case Intrinsic::fabs: ISD = ISD::FABS; break;
564 case Intrinsic::copysign: ISD = ISD::FCOPYSIGN; break;
565 case Intrinsic::floor: ISD = ISD::FFLOOR; break;
566 case Intrinsic::ceil: ISD = ISD::FCEIL; break;
567 case Intrinsic::trunc: ISD = ISD::FTRUNC; break;
569 ISD = ISD::FNEARBYINT; break;
570 case Intrinsic::rint: ISD = ISD::FRINT; break;
571 case Intrinsic::round: ISD = ISD::FROUND; break;
572 case Intrinsic::pow: ISD = ISD::FPOW; break;
573 case Intrinsic::fma: ISD = ISD::FMA; break;
574 case Intrinsic::fmuladd: ISD = ISD::FMA; break;
583 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
593 if (!TLI->isOperationExpand(ISD, LT.second)) {