Cross Reference: /external/llvm/lib/CodeGen/SplitKit.cpp

Lines Matching refs:RegIdx
373 VNInfo *SplitEditor::defValue(unsigned RegIdx,
379   LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
386     Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id),
389   // This was the first time (RegIdx, ParentVNI) was mapped.
409 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) {
411   ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)];
424   LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
430 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
437   LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
440   // so always begin RegIdx 0 early and all others late.
441   bool Late = RegIdx != 0;
458   return defValue(RegIdx, ParentVNI, Def);
665     unsigned RegIdx = AssignI.value();
667       DEBUG(dbgs() << "  cannot find simple kill of RegIdx " << RegIdx << '\n');
668       forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def));
732   // Get the complement interval, always RegIdx 0.
843     // RegAssign has holes where RegIdx 0 should be used.
847       unsigned RegIdx;
850         RegIdx = 0;
852         RegIdx = AssignI.value();
858         RegIdx = 0;
862       // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
863       DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
864       LiveRange &LR = LIS.getInterval(Edit->get(RegIdx));
867       ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id));
883       LiveRangeCalc &LRC = getLRCalc(RegIdx);
885       // This value has multiple defs in RegIdx, but it wasn't rematerialized,
951     unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
952     LiveRange &LR = LIS.getInterval(Edit->get(RegIdx));
953     LiveRangeCalc &LRC = getLRCalc(RegIdx);
962         assert(RegAssign.lookup(LastUse) == RegIdx &&
992     unsigned RegIdx = RegAssign.lookup(Idx);
993     LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
996                  << Idx << ':' << RegIdx << '\t' << *MI);
1014     getLRCalc(RegIdx).extend(*LI, Idx.getNextSlot());
1057     unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
1058     defValue(RegIdx, ParentVNI, ParentVNI->def);