Cross Reference: /external/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Lines Matching defs:NewOpc
1052   unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode);
1053   MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(NewOpc))
1155   unsigned NewOpc = 0;
1173       NewOpc = getPreIndexedLoadStoreOpcode(Opcode, AddSub);
1192       NewOpc = getPostIndexedLoadStoreOpcode(Opcode, AddSub);
1210     BuildMI(MBB, MBBI, dl, TII->get(NewOpc))
1219       if (NewOpc == ARM::LDR_PRE_IMM || NewOpc == ARM::LDRB_PRE_IMM) {
1221         BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
1226         BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
1233       BuildMI(MBB, MBBI, dl, TII->get(NewOpc), MI->getOperand(0).getReg())
1242     if (isAM2 && NewOpc == ARM::STR_POST_IMM) {
1245       BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base)
1251       BuildMI(MBB, MBBI, dl, TII->get(NewOpc), Base)
1361                           DebugLoc dl, unsigned NewOpc,
1369                                       TII->get(NewOpc))
1375                                       TII->get(NewOpc))
1421       unsigned NewOpc = (isLd)
1425         BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1432         BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(NewOpc))
1444       unsigned NewOpc = (isLd)
1464         InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc,
1479         InsertLDR_STR(MBB, MBBI, OffImm, isLd, dl, NewOpc,
1713       unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET);
1716       PrevMI->setDesc(TII->get(NewOpc));
1781                           unsigned &NewOpc, unsigned &EvenReg,
1877                                           unsigned &NewOpc, unsigned &EvenReg,
1890     NewOpc = ARM::LDRD;
1892     NewOpc = ARM::STRD;
1894     NewOpc = ARM::t2LDRDi8;
1898     NewOpc = ARM::t2STRDi8;
2040         unsigned NewOpc = 0;
2043         if (NumMove == 2 && CanFormLdStDWord(Op0, Op1, dl, NewOpc,
2049           const MCInstrDesc &MCID = TII->get(NewOpc);