Lines Matching refs:isAdd
547 bool isAdd = true;
552 isAdd = false;
558 isAdd = false;
562 return isAdd;
867 bool isAdd = true;
876 isAdd = false ; // 'U' bit is set as part of the fixup.
891 isAdd = false;
894 isAdd = false;
899 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups, STI);
903 if (isAdd)
925 bool isAdd = Imm8 >= 0;
936 if (isAdd)
951 bool isAdd = true;
957 isAdd = false ; // 'U' bit is set as part of the fixup.
966 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI);
976 if (isAdd)
1063 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add;
1072 // {12} = isAdd
1082 if (isAdd)
1093 // {12} isAdd
1107 // {12} isAdd
1112 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add;
1122 return Binary | (isAdd << 12) | (isReg << 13);
1129 // {4} isAdd
1133 bool isAdd = MO1.getImm() != 0;
1134 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg()) | (isAdd << 4);
1142 // {8} isAdd
1148 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1154 return Imm8 | (isAdd << 8) | (isImm << 9);
1163 // {8} isAdd
1184 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1190 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13);
1244 bool isAdd;
1250 isAdd = false; // 'U' bit is handled as part of the fixup.
1264 isAdd = ARM_AM::getAM5Op(Imm8) == ARM_AM::add;
1269 if (isAdd)