Lines Matching refs:Imm
82 inline SDValue getI32Imm(unsigned Imm) {
83 return CurDAG->getTargetConstant(Imm, MVT::i32);
88 inline SDValue getI64Imm(uint64_t Imm) {
89 return CurDAG->getTargetConstant(Imm, MVT::i64);
93 inline SDValue getSmallIPtrImm(unsigned Imm) {
94 return CurDAG->getTargetConstant(Imm, PPCLowering->getPointerTy());
295 static bool isIntS16Immediate(SDNode *N, short &Imm) {
299 Imm = (short)cast<ConstantSDNode>(N)->getZExtValue();
301 return Imm == (int32_t)cast<ConstantSDNode>(N)->getZExtValue();
303 return Imm == (int64_t)cast<ConstantSDNode>(N)->getZExtValue();
306 static bool isIntS16Immediate(SDValue Op, short &Imm) {
307 return isIntS16Immediate(Op.getNode(), Imm);
312 /// operand. If so Imm will receive the 32-bit value.
313 static bool isInt32Immediate(SDNode *N, unsigned &Imm) {
315 Imm = cast<ConstantSDNode>(N)->getZExtValue();
322 /// operand. If so Imm will receive the 64-bit value.
323 static bool isInt64Immediate(SDNode *N, uint64_t &Imm) {
325 Imm = cast<ConstantSDNode>(N)->getZExtValue();
332 // If so Imm will receive the 32 bit value.
333 static bool isInt32Immediate(SDValue N, unsigned &Imm) {
334 return isInt32Immediate(N.getNode(), Imm);
340 // If so Imm will receive the 32 bit value.
341 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
343 && isInt32Immediate(N->getOperand(1).getNode(), Imm);
498 unsigned Imm;
500 if (isInt32Immediate(RHS, Imm)) {
502 if (isUInt<16>(Imm))
504 getI32Imm(Imm & 0xFFFF)), 0);
506 if (isInt<16>((int)Imm))
508 getI32Imm(Imm & 0xFFFF)), 0);
520 getI32Imm(Imm >> 16)), 0);
522 getI32Imm(Imm & 0xFFFF)), 0);
526 if (isInt32Immediate(RHS, Imm) && isUInt<16>(Imm))
528 getI32Imm(Imm & 0xFFFF)), 0);
539 uint64_t Imm;
541 if (isInt64Immediate(RHS.getNode(), Imm)) {
543 if (isUInt<16>(Imm))
545 getI32Imm(Imm & 0xFFFF)), 0);
547 if (isInt<16>(Imm))
549 getI32Imm(Imm & 0xFFFF)), 0);
560 if (isUInt<32>(Imm)) {
562 getI64Imm(Imm >> 16)), 0);
564 getI64Imm(Imm & 0xFFFF)), 0);
569 if (isInt64Immediate(RHS.getNode(), Imm) && isUInt<16>(Imm))
571 getI64Imm(Imm & 0xFFFF)), 0);
746 unsigned Imm;
752 isInt32Immediate(N->getOperand(1), Imm)) {
756 if (Imm == 0) {
785 } else if (Imm == ~0U) { // setcc op, -1
933 int64_t Imm = cast<ConstantSDNode>(N)->getZExtValue();
940 if (!isInt<32>(Imm)) {
941 Shift = countTrailingZeros<uint64_t>(Imm);
942 int64_t ImmSh = static_cast<uint64_t>(Imm) >> Shift;
947 Imm = ImmSh;
950 Remainder = Imm;
952 Imm >>= 32;
960 unsigned Lo = Imm & 0xFFFF;
961 unsigned Hi = (Imm >> 16) & 0xFFFF;
964 if (isInt<16>(Imm)) {
983 if (Imm) {
1037 unsigned Imm;
1038 if (isInt32Immediate(N->getOperand(1), Imm)) {
1040 if ((signed)Imm > 0 && isPowerOf2_32(Imm)) {
1043 N0, getI32Imm(Log2_32(Imm)));
1046 } else if ((signed)Imm < 0 && isPowerOf2_32(-Imm)) {
1049 N0, getI32Imm(Log2_32(-Imm)));
1147 unsigned Imm, Imm2, SH, MB, ME;
1152 if (isInt32Immediate(N->getOperand(1), Imm) &&
1153 isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, MB, ME)) {
1160 if (isInt32Immediate(N->getOperand(1), Imm) &&
1161 isRunOfOnes(Imm, MB, ME) &&
1180 isInt32Immediate(Val.getOperand(1).getNode(), Imm) && Imm <= MB) {
1181 assert(Imm < 64 && "Illegal shift amount");
1183 SH = 64 - Imm;
1190 if (isInt32Immediate(N->getOperand(1), Imm) && (Imm == 0)) {
1196 if (isInt32Immediate(N->getOperand(1), Imm) &&
1200 Imm = ~(Imm^Imm2);
1201 if (isRunOfOnes(Imm, MB, ME)) {
1220 unsigned Imm, SH, MB, ME;
1221 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) &&
1222 isRotateAndMask(N, Imm, true, SH, MB, ME)) {
1232 unsigned Imm, SH, MB, ME;
1233 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) &&
1234 isRotateAndMask(N, Imm, true, SH, MB, ME)) {