Cross Reference: /external/llvm/lib/Target/R600/R600MachineScheduler.cpp

Lines Matching refs:SU
60   SUnit *SU = nullptr;
96   if (!SU && ((AllowSwitchToAlu && CurInstKind != IDAlu) ||
99     SU = pickAlu();
100     if (!SU && !PhysicalRegCopy.empty()) {
101       SU = PhysicalRegCopy.front();
104     if (SU) {
111   if (!SU) {
113     SU = pickOther(IDFetch);
114     if (SU)
119   if (!SU) {
120     SU = pickOther(IDOther);
121     if (SU)
126       if (SU) {
128         SU->dump(DAG);
139   return SU;
142 void R600SchedStrategy::schedNode(SUnit *SU, bool IsTopNode) {
153     switch (getAluKind(SU)) {
161       for (MachineInstr::mop_iterator It = SU->getInstr()->operands_begin(),
162           E = SU->getInstr()->operands_end(); It != E; ++It) {
190 void R600SchedStrategy::releaseTopNode(SUnit *SU) {
191   DEBUG(dbgs() << "Top Releasing ";SU->dump(DAG););
194 void R600SchedStrategy::releaseBottomNode(SUnit *SU) {
195   DEBUG(dbgs() << "Bottom Releasing ";SU->dump(DAG););
196   if (isPhysicalRegCopy(SU->getInstr())) {
197     PhysicalRegCopy.push_back(SU);
201   int IK = getInstKind(SU);
205     Available[IDOther].push_back(SU);
207     Pending[IK].push_back(SU);
220 R600SchedStrategy::AluKind R600SchedStrategy::getAluKind(SUnit *SU) const {
221   MachineInstr *MI = SU->getInstr();
294 int R600SchedStrategy::getInstKind(SUnit* SU) {
295   int Opcode = SU->getInstr()->getOpcode();
323     SUnit *SU = *It;
324     InstructionsGroupCandidate.push_back(SU->getInstr());
326         && (!AnyALU || !TII->isVectorOnly(SU->getInstr()))
330       return SU;
433       SUnit *SU = AttemptFillSlot(3, true);
434       if (SU) {
436         return SU;
442         SUnit *SU = AttemptFillSlot(Chan, false);
443         if (SU) {
445           InstructionsGroupCandidate.push_back(SU->getInstr());
446           return SU;
456   SUnit *SU = nullptr;
463     SU = AQ.back();
466   return SU;