Lines Matching refs:Insn
106 unsigned Insn,
111 unsigned Insn,
116 unsigned Insn,
121 unsigned Insn,
126 unsigned Insn,
131 unsigned Insn,
136 unsigned Insn,
141 unsigned Insn,
146 unsigned Insn,
151 unsigned Insn,
156 unsigned Insn,
161 unsigned Insn,
166 unsigned Insn,
171 unsigned Insn,
176 unsigned Insn,
181 unsigned Insn,
186 unsigned Insn,
191 unsigned Insn,
196 unsigned Insn,
201 unsigned Insn,
206 unsigned Insn,
254 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) {
255 unsigned Combined = fieldFromInstruction(Insn, 6, 5);
258 if (fieldFromInstruction(Insn, 5, 1)) {
266 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 2, 2);
267 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 0, 2);
272 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2,
274 unsigned Combined = fieldFromInstruction(Insn, 6, 5);
281 Op1 = (Op1High << 2) | fieldFromInstruction(Insn, 4, 2);
282 Op2 = (Op2High << 2) | fieldFromInstruction(Insn, 2, 2);
283 Op3 = (Op3High << 2) | fieldFromInstruction(Insn, 0, 2);
288 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
291 unsigned Opcode = fieldFromInstruction(Insn, 11, 5);
295 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
298 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
301 return Decode3RInstruction(Inst, Insn, Address, Decoder);
304 return Decode3RInstruction(Inst, Insn, Address, Decoder);
307 return Decode3RInstruction(Inst, Insn, Address, Decoder);
310 return Decode3RInstruction(Inst, Insn, Address, Decoder);
313 return Decode3RInstruction(Inst, Insn, Address, Decoder);
316 return Decode3RInstruction(Inst, Insn, Address, Decoder);
319 return Decode3RInstruction(Inst, Insn, Address, Decoder);
322 return Decode3RInstruction(Inst, Insn, Address, Decoder);
325 return Decode3RInstruction(Inst, Insn, Address, Decoder);
328 return Decode3RInstruction(Inst, Insn, Address, Decoder);
331 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
334 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
337 return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder);
340 return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder);
343 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
346 return Decode3RImmInstruction(Inst, Insn, Address, Decoder);
349 return Decode3RInstruction(Inst, Insn, Address, Decoder);
352 return Decode3RInstruction(Inst, Insn, Address, Decoder);
358 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
361 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
363 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
371 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
374 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
376 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
384 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
387 DecodeStatus S = Decode2OpInstruction(Insn, Op2, Op1);
389 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
397 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
400 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
402 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
411 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
414 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
416 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
424 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
427 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
429 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
437 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
440 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2);
442 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
451 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
454 unsigned Opcode = fieldFromInstruction(Insn, 16, 4) |
455 fieldFromInstruction(Insn, 27, 5) << 4;
459 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
462 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
465 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
468 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
471 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
474 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
477 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
480 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
483 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
486 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
489 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
492 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
495 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
498 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
501 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
504 return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder);
507 return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder);
510 return DecodeL3RSrcDstInstruction(Inst, Insn, Address, Decoder);
513 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
516 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
522 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
525 DecodeStatus S = Decode2OpInstruction(fieldFromInstruction(Insn, 0, 16),
528 return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder);
536 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
539 DecodeStatus S = Decode2OpInstruction(fieldFromInstruction(Insn, 0, 16),
542 return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder);
550 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
553 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
563 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
566 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
576 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
579 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
589 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
592 DecodeStatus S = Decode3OpInstruction(Insn, Op1, Op2, Op3);
602 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
606 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
616 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
620 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
631 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
635 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
645 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
649 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
659 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
663 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
666 S = Decode3OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5, Op6);
679 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
683 unsigned Opcode = fieldFromInstruction(Insn, 27, 5);
687 return DecodeL6RInstruction(Inst, Insn, Address, Decoder);
693 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
697 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
699 return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder);
700 S = Decode2OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5);
702 return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder);
713 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
716 unsigned Op4 = fieldFromInstruction(Insn, 16, 4);
718 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);
732 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
735 unsigned Op4 = fieldFromInstruction(Insn, 16, 4);
737 Decode3OpInstruction(fieldFromInstruction(Insn, 0, 16), Op1, Op2, Op3);