Lines Matching refs:reg
34 assign_reg(int *reg_hw_locations, fs_reg *reg, int reg_width)
36 if (reg->file == GRF) {
37 assert(reg->reg_offset >= 0);
38 reg->reg = reg_hw_locations[reg->reg] + reg->reg_offset * reg_width;
39 reg->reg_offset = 0;
101 int reg = 0;
110 pairs_base_reg = reg;
115 ra_class_add_reg(brw->wm.regs, brw->wm.classes[i], reg);
117 brw->wm.ra_reg_to_grf[reg] = j;
122 ra_add_transitive_reg_conflict(brw->wm.regs, base_reg, reg);
125 reg++;
128 assert(reg == ra_reg_count);
216 this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC].reg == i) {
233 /* Failed to allocate registers. Spill a reg, and the caller will
236 int reg = choose_spill_reg(g);
238 if (reg == -1) {
244 spill_reg(reg);
254 * regs in the register classes back down to real hardware reg
259 int reg = ra_get_node_reg(g, i);
262 brw->wm.ra_reg_to_grf[reg] * reg_width);
319 spill_costs[inst->src[i].reg] += loop_scale;
329 no_spill[inst->src[i].reg] = true;
335 spill_costs[inst->dst.reg] += inst->regs_written() * loop_scale;
338 no_spill[inst->dst.reg] = true;
354 no_spill[inst->src[0].reg] = true;
359 no_spill[inst->dst.reg] = true;
393 inst->src[i].reg == spill_reg) {
394 inst->src[i].reg = virtual_grf_alloc(1);
401 inst->dst.reg == spill_reg) {
404 inst->dst.reg = virtual_grf_alloc(inst->regs_written());