| /external/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmInstrumentation.cpp | 39 std::string FuncName(unsigned AccessSize, bool IsWrite) { argument
40 return std::string("__asan_report_") + (IsWrite ? "store" : "load") +
58 X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
61 X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
65 bool IsWrite, MCContext &Ctx, MCStreamer &Out);
79 MCParsedAsmOperand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx,
92 InstrumentMemOperandSmallImpl(MemOp, AccessSize, IsWrite, Ctx, Out);
94 InstrumentMemOperandLargeImpl(MemOp, AccessSize, IsWrite, Ctx, Out);
134 const bool IsWrite = MII.get(Inst.getOpcode()).mayStore(); local
139 InstrumentMemOperand(Op, AccessSize, IsWrite, Ct
78 InstrumentMemOperand( MCParsedAsmOperand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx, MCStreamer &Out) argument
159 EmitCallAsanReport(MCContext &Ctx, MCStreamer &Out, unsigned AccessSize, bool IsWrite, unsigned AddressReg) argument
177 InstrumentMemOperandSmallImpl( X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx, MCStreamer &Out) argument
259 InstrumentMemOperandLargeImpl( X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx, MCStreamer &Out) argument
337 EmitCallAsanReport(MCContext &Ctx, MCStreamer &Out, unsigned AccessSize, bool IsWrite) argument
353 InstrumentMemOperandSmallImpl( X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx, MCStreamer &Out) argument
434 InstrumentMemOperandLargeImpl( X86Operand &Op, unsigned AccessSize, bool IsWrite, MCContext &Ctx, MCStreamer &Out) argument
[all...] |
| /external/llvm/lib/Transforms/Instrumentation/ |
| H A D | ThreadSanitizer.cpp | 384 bool IsWrite = isa<StoreInst>(*I); local
385 Value *Addr = IsWrite
391 if (IsWrite && isVtableAccess(I)) {
409 if (!IsWrite && isVtableAccess(I)) {
415 Value *OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx];
417 if (IsWrite) NumInstrumentedWrites++;
|
| H A D | AddressSanitizer.cpp | 370 Value *Addr, uint32_t TypeSize, bool IsWrite,
375 bool IsWrite, size_t AccessSizeIndex,
656 // and set IsWrite/Alignment. Otherwise return NULL.
657 static Value *isInterestingMemoryAccess(Instruction *I, bool *IsWrite, argument
661 *IsWrite = false;
667 *IsWrite = true;
673 *IsWrite = true;
679 *IsWrite = true;
729 bool IsWrite = false; local
731 Value *Addr = isInterestingMemoryAccess(I, &IsWrite,
802 generateCrashCode( Instruction *InsertBefore, Value *Addr, bool IsWrite, size_t AccessSizeIndex, Value *SizeArgument) argument
835 instrumentAddress(Instruction *OrigIns, Instruction *InsertBefore, Value *Addr, uint32_t TypeSize, bool IsWrite, Value *SizeArgument, bool UseCalls) argument
1375 bool IsWrite; local
[all...] |
| /external/compiler-rt/lib/tsan/rtl/ |
| H A D | tsan_rtl.h | 193 DCHECK_EQ(kAccessIsWrite, IsWrite());
243 bool ALWAYS_INLINE IsWrite() const { return !IsRead(); } function in class:__tsan::Shadow
272 DCHECK_EQ(v, (!IsWrite() && !kIsWrite) || (IsAtomic() && kIsAtomic));
280 (IsAtomic() == kIsAtomic && !IsWrite() <= !kIsWrite));
288 (IsAtomic() == kIsAtomic && !IsWrite() >= !kIsWrite));
|
| /external/pdfium/core/src/fxcodec/lcms2/lcms2-2.6/src/ |
| H A D | lcms2_internal.h | 738 cmsBool IsWrite; member in struct:_cms_iccprofile_struct
|
| /external/llvm/lib/Transforms/Vectorize/ |
| H A D | LoopVectorize.cpp | 3977 bool IsWrite = Access.getInt(); local
3980 if (!IsWrite && Accesses.count(MemAccessInfo(Ptr, true)))
3983 if (IsWrite)
4006 RtCheck.insert(SE, TheLoop, Ptr, IsWrite, DepId, StridesMap);
4062 bool IsWrite = Access.getInt(); local
4070 // second check for "!IsWrite".
4071 bool IsReadOnlyPtr = ReadOnlyPtr.count(Ptr) && !IsWrite;
4095 if ((IsWrite && !isFunctionScopeIdentifiedObject(UnderlyingObj)) ||
4096 (!IsWrite && (!AreAllWritesIdentified ||
4100 (IsWrite
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1333 unsigned IsWrite = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue(); local
1350 unsigned PrfOp = (IsWrite << 4) | // Load/Store bit
|