/external/chromium_org/third_party/mesa/src/src/mesa/swrast/ |
H A D | s_atifragshader.c | 36 GLfloat Registers[6][4]; /** six temporary registers */ member in struct:atifs_machine 236 COPY_4V(machine->PrevPassRegisters[i], machine->Registers[i]); 265 COPY_4V(machine->Registers[idx], 270 COPY_4V(machine->Registers[idx], machine->PrevPassRegisters[pass_tex]); 272 apply_swizzle(machine->Registers[idx], swizzle); 296 fetch_texel(ctx, tex_coords, 0.0F, idx, machine->Registers[idx]); 353 machine->Registers[index - GL_REG_0_ATI]); 540 dstp = machine->Registers[dstreg - GL_REG_0_ATI]; 569 machine->Registers[i][j] = 0.0; 599 const GLfloat *colOut = machine.Registers[ [all...] |
/external/chromium_org/v8/src/mips64/ |
H A D | constants-mips64.h | 88 // Registers and FPURegisters. 144 class Registers { class in namespace:v8::internal
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/external/mesa3d/src/mesa/swrast/ |
H A D | s_atifragshader.c | 36 GLfloat Registers[6][4]; /** six temporary registers */ member in struct:atifs_machine 236 COPY_4V(machine->PrevPassRegisters[i], machine->Registers[i]); 265 COPY_4V(machine->Registers[idx], 270 COPY_4V(machine->Registers[idx], machine->PrevPassRegisters[pass_tex]); 272 apply_swizzle(machine->Registers[idx], swizzle); 296 fetch_texel(ctx, tex_coords, 0.0F, idx, machine->Registers[idx]); 353 machine->Registers[index - GL_REG_0_ATI]); 540 dstp = machine->Registers[dstreg - GL_REG_0_ATI]; 569 machine->Registers[i][j] = 0.0; 599 const GLfloat *colOut = machine.Registers[ [all...] |
/external/chromium_org/v8/src/mips/ |
H A D | constants-mips.h | 126 // Registers and FPURegisters. 182 class Registers { class in namespace:v8::internal
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/external/llvm/utils/TableGen/ |
H A D | RegisterInfoEmitter.cpp | 71 const std::vector<CodeGenRegister*> &Registers = Bank.getRegisters(); local 74 assert(Registers.size() <= 0xffff && "Too many regs to fit in tables"); 76 std::string Namespace = Registers[0]->TheDef->getValueAsString("Namespace"); 93 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 94 OS << " " << Registers[i]->getName() << " = " << 95 Registers[i]->EnumValue << ",\n"; 96 assert(Registers.size() == Registers[Registers.size()-1]->EnumValue && 98 OS << " NUM_TARGET_REGS \t// " << Registers [all...] |
H A D | AsmWriterEmitter.cpp | 525 const std::vector<CodeGenRegister*> &Registers) { 527 SmallVector<std::string, 4> AsmNames(Registers.size()); 528 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 529 const CodeGenRegister &Reg = *Registers[i]; 568 for (unsigned i = 0, e = Registers.size(); i != e; ++i) { 580 const std::vector<CodeGenRegister*> &Registers = local 594 O << " assert(RegNo && RegNo < " << (Registers.size()+1) 600 emitRegisterNameString(O, AltNameIndices[i]->getName(), Registers); 602 emitRegisterNameString(O, "", Registers); 524 emitRegisterNameString(raw_ostream &O, StringRef AltName, const std::vector<CodeGenRegister*> &Registers) argument
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H A D | CodeGenRegisters.h | 173 // less than RegBank.getNumTopoSigs(). Registers with the same TopoSig have 459 // Registers. 460 std::vector<CodeGenRegister*> Registers; member in class:llvm::CodeGenRegBank 550 const std::vector<CodeGenRegister*> &getRegisters() { return Registers; } 558 // Get a Register's index into the Registers array.
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H A D | AsmMatcherEmitter.cpp | 197 RegisterSet Registers; member in struct:__anon26561::ClassInfo 219 // Registers classes are only related to registers classes, and only if 227 std::set_intersection(Registers.begin(), Registers.end(), 228 RHS.Registers.begin(), RHS.Registers.end(), 1079 const std::vector<CodeGenRegister*> &Registers = local 1106 for (std::vector<CodeGenRegister*>::const_iterator it = Registers.begin(), 1107 ie = Registers.end(); it != ie; ++it) { 1148 CI->Registers [all...] |
H A D | CodeGenRegisters.cpp | 943 Registers.reserve(Regs.size()); 965 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 966 Registers[i]->buildObjectGraph(*this); 969 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 971 Registers[i]->TheDef->getValueAsString("AsmName"), 972 Registers[i]); 976 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 977 Registers[i]->computeSubRegs(*this); 980 for (unsigned i = 0, e = Registers.size(); i != e; ++i) 981 if (Registers[ 1248 const std::vector<CodeGenRegister*> &Registers = RegBank.getRegisters(); local [all...] |
/external/chromium_org/v8/src/arm/ |
H A D | constants-arm.h | 659 class Registers { class in namespace:v8::internal
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 404 SmallVector<unsigned, 8> Registers; member in class:__anon25988::ARMOperand 557 Registers = o.Registers; 649 return Registers; 2611 Op->Registers.push_back(I->second); 3301 SmallVector<std::pair<unsigned, unsigned>, 16> Registers; local 3307 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3322 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3353 Registers.push_back(std::pair<unsigned, unsigned>(EReg, Reg)); 3390 Registers [all...] |
/external/robolectric/lib/main/ |
H A D | sqlite-jdbc-3.7.2.jar | META-INF/ META-INF/MANIFEST.MF META-INF/maven/ META-INF/maven/org. ... |