Searched defs:Rm (Results 1 - 6 of 6) sorted by relevance

/system/core/libpixelflinger/codeflinger/
H A DARMAssembler.cpp229 int Rd, int Rm, int Rs, int Rn) {
230 if (Rd == Rm) { int t = Rm; Rm=Rs; Rs=t; }
231 LOG_FATAL_IF(Rd==Rm, "MLA(r%u,r%u,r%u,r%u)", Rd,Rm,Rs,Rn);
233 (Rd<<16) | (Rn<<12) | (Rs<<8) | 0x90 | Rm;
236 int Rd, int Rm, int Rs) {
237 if (Rd == Rm) { int t = Rm; R
228 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument
235 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
241 UMULL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
248 UMUAL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
255 SMULL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
262 SMUAL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
355 SWP(int cc, int Rn, int Rd, int Rm) argument
358 SWPB(int cc, int Rn, int Rd, int Rm) argument
377 CLZ(int cc, int Rd, int Rm) argument
382 QADD(int cc, int Rd, int Rm, int Rn) argument
387 QDADD(int cc, int Rd, int Rm, int Rn) argument
392 QSUB(int cc, int Rd, int Rm, int Rn) argument
397 QDSUB(int cc, int Rd, int Rm, int Rn) argument
402 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
408 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
414 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
420 SMLAL(int cc, int xy, int RdHi, int RdLo, int Rs, int Rm) argument
426 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument
437 UXTB16(int cc, int Rd, int Rm, int rotate) argument
510 reg_imm(int Rm, int type, uint32_t shift) argument
515 reg_rrx(int Rm) argument
520 reg_reg(int Rm, int type, int Rs) argument
545 reg_scale_pre(int Rm, int type, uint32_t shift, int W) argument
553 reg_scale_post(int Rm, int type, uint32_t shift) argument
583 reg_pre(int Rm, int W) argument
588 reg_post(int Rm) argument
[all...]
H A DARMAssemblerProxy.cpp93 uint32_t ARMAssemblerProxy::reg_imm(int Rm, int type, uint32_t shift) argument
95 return mTarget->reg_imm(Rm, type, shift);
98 uint32_t ARMAssemblerProxy::reg_rrx(int Rm) argument
100 return mTarget->reg_rrx(Rm);
103 uint32_t ARMAssemblerProxy::reg_reg(int Rm, int type, int Rs) argument
105 return mTarget->reg_reg(Rm, type, Rs);
111 // (immediate and Rm can be negative, which indicates U=0)
122 uint32_t ARMAssemblerProxy::reg_scale_pre(int Rm, int type, uint32_t shift, int W) argument
124 return mTarget->reg_scale_pre(Rm, type, shift, W);
127 uint32_t ARMAssemblerProxy::reg_scale_post(int Rm, in argument
145 reg_pre(int Rm, int W) argument
150 reg_post(int Rm) argument
166 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument
169 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
172 UMULL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
176 UMUAL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
180 SMULL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
184 SMUAL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
243 SWP(int cc, int Rn, int Rd, int Rm) argument
246 SWPB(int cc, int Rn, int Rd, int Rm) argument
257 CLZ(int cc, int Rd, int Rm) argument
260 QADD(int cc, int Rd, int Rm, int Rn) argument
263 QDADD(int cc, int Rd, int Rm, int Rn) argument
266 QSUB(int cc, int Rd, int Rm, int Rn) argument
269 QDSUB(int cc, int Rd, int Rm, int Rn) argument
272 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
275 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
278 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
281 SMLAL( int cc, int xy, int RdHi, int RdLo, int Rs, int Rm) argument
285 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument
289 UXTB16(int cc, int Rd, int Rm, int rotate) argument
[all...]
H A DARMAssemblerInterface.h81 virtual uint32_t reg_imm(int Rm, int type, uint32_t shift) = 0;
82 virtual uint32_t reg_rrx(int Rm) = 0;
83 virtual uint32_t reg_reg(int Rm, int type, int Rs) = 0;
87 // (immediate and Rm can be negative, which indicates U=0)
90 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0) = 0;
91 virtual uint32_t reg_scale_post(int Rm, int type=0, uint32_t shift=0) = 0;
94 // (immediate and Rm can be negative, which indicates U=0)
97 virtual uint32_t reg_pre(int Rm, int W=0) = 0;
98 virtual uint32_t reg_post(int Rm) = 0;
128 int Rd, int Rm, in
288 SMULBB(int cc, int Rd, int Rm, int Rs) argument
290 SMULTB(int cc, int Rd, int Rm, int Rs) argument
292 SMULBT(int cc, int Rd, int Rm, int Rs) argument
294 SMULTT(int cc, int Rd, int Rm, int Rs) argument
297 SMULWB(int cc, int Rd, int Rm, int Rs) argument
299 SMULWT(int cc, int Rd, int Rm, int Rs) argument
303 SMLABB(int cc, int Rd, int Rm, int Rs, int Rn) argument
306 SMLATB(int cc, int Rd, int Rm, int Rs, int Rn) argument
309 SMLABT(int cc, int Rd, int Rm, int Rs, int Rn) argument
312 SMLATT(int cc, int Rd, int Rm, int Rs, int Rn) argument
316 SMLALBB(int cc, int RdHi, int RdLo, int Rs, int Rm) argument
319 SMLALTB(int cc, int RdHi, int RdLo, int Rs, int Rm) argument
322 SMLALBT(int cc, int RdHi, int RdLo, int Rs, int Rm) argument
325 SMLALTT(int cc, int RdHi, int RdLo, int Rs, int Rm) argument
329 SMLAWB(int cc, int Rd, int Rm, int Rs, int Rn) argument
332 SMLAWT(int cc, int Rd, int Rm, int Rs, int Rn) argument
[all...]
H A DArm64Assembler.cpp376 uint32_t Rm; local
382 Rm = mAddrMode.reg_imm_Rm;
388 Rm = Op2;
398 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break;
399 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break;
400 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break;
401 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break;
402 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break;
472 int Rm = mAddrMode.reg_imm_Rm; local
474 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amoun
478 int Rm = Op2; local
488 int Rm = mTmpReg1; local
519 MLA(int cc, int s,int Rd, int Rm, int Rs, int Rn) argument
527 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
774 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
794 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
810 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
837 UXTB16(int cc, int Rd, int Rm, int rotate) argument
885 reg_imm(int Rm, int type, uint32_t shift) argument
925 reg_scale_pre(int Rm, int type, uint32_t shift, int W) argument
964 reg_pre(int Rm, int W) argument
1002 A64_LDRSTR_Wm_SXTW_0(uint32_t op, uint32_t size, uint32_t Rt, uint32_t Rn, uint32_t Rm) argument
1045 A64_ADD_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument
1056 A64_SUB_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t amount) argument
1073 A64_ADD_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1096 A64_ADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1106 A64_SUB_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount, uint32_t setflag) argument
1127 A64_AND_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1137 A64_ORR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1147 A64_ORN_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t shift, uint32_t amount) argument
1157 A64_CSEL_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond) argument
1164 A64_CSEL_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond) argument
1198 A64_SMADDL(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra) argument
1205 A64_MADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra) argument
1234 A64_EXTR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t lsb) argument
[all...]
H A DMIPSAssembler.cpp234 uint32_t ArmToMipsAssembler::reg_imm(int Rm, int type, uint32_t shift) argument
236 amode.reg = Rm;
242 uint32_t ArmToMipsAssembler::reg_rrx(int Rm) argument
248 uint32_t ArmToMipsAssembler::reg_reg(int Rm, int type, int Rs) argument
256 // LDR(B)/STR(B)/PLD (immediate and Rm can be negative, which indicate U=0)
277 uint32_t ArmToMipsAssembler::reg_scale_pre(int Rm, int type, argument
282 amode.reg = Rm;
289 uint32_t ArmToMipsAssembler::reg_scale_post(int Rm, int type, uint32_t shift) argument
295 // LDRH/LDRSB/LDRSH/STRH (immediate and Rm can be negative, which indicate U=0)
319 uint32_t ArmToMipsAssembler::reg_pre(int Rm, in argument
326 reg_post(int Rm) argument
613 MLA(int cc, int s, int Rd, int Rm, int Rs, int Rn) argument
626 MUL(int cc, int s, int Rd, int Rm, int Rs) argument
636 UMULL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
649 UMUAL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
665 SMULL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
680 SMUAL(int cc, int s, int RdLo, int RdHi, int Rm, int Rs) argument
1005 SWP(int cc, int Rn, int Rd, int Rm) argument
1012 SWPB(int cc, int Rn, int Rd, int Rm) argument
1042 CLZ(int cc, int Rd, int Rm) argument
1048 QADD(int cc, int Rd, int Rm, int Rn) argument
1056 QDADD(int cc, int Rd, int Rm, int Rn) argument
1064 QSUB(int cc, int Rd, int Rm, int Rn) argument
1072 QDSUB(int cc, int Rd, int Rm, int Rn) argument
1081 SMUL(int cc, int xy, int Rd, int Rm, int Rs) argument
1120 SMULW(int cc, int y, int Rd, int Rm, int Rs) argument
1140 SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn) argument
1180 SMLAL(int cc, int xy, int RdHi, int RdLo, int Rs, int Rm) argument
1189 SMLAW(int cc, int y, int Rd, int Rm, int Rs, int Rn) argument
1199 UXTB16(int cc, int Rd, int Rm, int rotate) argument
[all...]
/system/core/libpixelflinger/tests/arch-arm64/assembler/
H A Darm64_assembler_test.cpp415 uint32_t Rn = 1, uint32_t Rm = 2, uint32_t Rs = 3)
440 op2 = Rm;
441 regs[Rm] = test.RmValue;
445 op2 = a64asm->reg_imm(Rm, test.shiftMode, test.shiftAmount);
446 regs[Rm] = test.RmValue;
456 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break;
457 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break;
461 case INSTR_SMULBB:a64asm->SMULBB(test.cond, Rd,Rm,Rs); break;
462 case INSTR_SMULBT:a64asm->SMULBT(test.cond, Rd,Rm,Rs); break;
463 case INSTR_SMULTB:a64asm->SMULTB(test.cond, Rd,Rm,R
752 uint32_t Rd, Rm, Rs, Rn; local
[all...]

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