/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 62 unsigned SrcAlign = getKnownAlignment(MI->getArgOperand(1), DL); local 63 unsigned MinAlign = std::min(DstAlign, SrcAlign); 137 SrcAlign = std::max(SrcAlign, CopyAlign); 143 L->setAlignment(SrcAlign);
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/external/llvm/lib/Transforms/Scalar/ |
H A D | SROA.cpp | 2622 unsigned SrcAlign = OtherAlign; local 2627 std::swap(SrcAlign, DstAlign); 2642 Src = IRB.CreateAlignedLoad(SrcPtr, SrcAlign, II.isVolatile(),
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 3244 unsigned SrcAlign, 3243 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 3782 unsigned DstAlign, unsigned SrcAlign, 3789 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3791 // If 'SrcAlign' is zero, that means the memory operation does not need to 3798 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3909 unsigned SrcAlign = DAG.InferPtrAlignment(Src); local 3910 if (Align > SrcAlign) 3911 SrcAlign = Align; 3919 (isZeroStr ? 0 : SrcAlign), 3985 MinAlign(SrcAlign, SrcOf 3780 FindOptimalMemOpLowering(std::vector<EVT> &MemOps, unsigned Limit, uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, bool AllowOverlap, SelectionDAG &DAG, const TargetLowering &TLI) argument 4023 unsigned SrcAlign = DAG.InferPtrAlignment(Src); local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 1675 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it 1685 unsigned DstAlign, unsigned SrcAlign, 1696 (SrcAlign == 0 || SrcAlign >= 16)))) { 1684 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 6147 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, argument 6149 return ((SrcAlign == 0 || SrcAlign % AlignCheck == 0) && 6154 unsigned SrcAlign, bool IsMemset, 6166 (memOpAlign(SrcAlign, DstAlign, 16) || 6153 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 9723 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, argument 9725 return ((SrcAlign == 0 || SrcAlign % AlignCheck == 0) && 9730 unsigned DstAlign, unsigned SrcAlign, 9743 (memOpAlign(SrcAlign, DstAlign, 16) || 9747 (memOpAlign(SrcAlign, DstAlign, 8) || 9729 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 8878 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it 8887 unsigned DstAlign, unsigned SrcAlign, 8886 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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