/external/mesa3d/src/gallium/state_trackers/egl/drm/ |
H A D | native_drm.c | 254 struct gbm_gallium_drm_bo *bo = (void *) pix; local 256 return drm_display_create_surface_from_resource(ndpy, bo->resource);
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/external/mesa3d/src/gallium/winsys/radeon/drm/ |
H A D | radeon_drm_cs.c | 210 int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo) argument 214 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1); 219 if (reloc->handle == bo->handle) { 227 if (reloc->handle == bo->handle) { 238 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/ 248 struct radeon_bo *bo, 255 unsigned hash = bo->handle & (sizeof(csc->is_handle_added)-1); 262 if (reloc->handle == bo->handle) { 271 if (reloc->handle == bo->handle) { 275 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo 247 radeon_add_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo, enum radeon_bo_usage usage, enum radeon_bo_domain domains, enum radeon_bo_domain *added_domains) argument 320 struct radeon_bo *bo = (struct radeon_bo*)buf; local 383 struct radeon_bo *bo = (struct radeon_bo*)buf; local 538 struct radeon_bo *bo = (struct radeon_bo*)_buf; local [all...] |
/external/mesa3d/src/gbm/main/ |
H A D | gbm.c | 172 * \param bo The buffer object 177 gbm_bo_get_width(struct gbm_bo *bo) argument 179 return bo->width; 184 * \param bo The buffer object 188 gbm_bo_get_height(struct gbm_bo *bo) argument 190 return bo->height; 198 * \param bo The buffer object 202 gbm_bo_get_stride(struct gbm_bo *bo) argument 204 return bo->stride; 211 * \param bo Th 215 gbm_bo_get_format(struct gbm_bo *bo) argument 229 gbm_bo_get_handle(struct gbm_bo *bo) argument 248 gbm_bo_write(struct gbm_bo *bo, const void *buf, size_t count) argument 259 gbm_bo_get_device(struct gbm_bo *bo) argument 272 gbm_bo_set_user_data(struct gbm_bo *bo, void *data, void (*destroy_user_data)(struct gbm_bo *, void *)) argument 288 gbm_bo_get_user_data(struct gbm_bo *bo) argument 300 gbm_bo_destroy(struct gbm_bo *bo) argument 447 gbm_surface_release_buffer(struct gbm_surface *surf, struct gbm_bo *bo) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | gen7_wm_surface_state.c | 127 assert ((mcs_mt->region->bo->offset & 0xfff) == 0); 130 surf->ss6.mcs_enabled.mcs_base_address = mcs_mt->region->bo->offset >> 12; 131 drm_intel_bo_emit_reloc(brw->intel.batch.bo, 134 mcs_mt->region->bo, 242 drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; local 260 if (bo) { 261 surf->ss1.base_addr = bo->offset; /* reloc */ 267 drm_intel_bo_emit_reloc(brw->intel.batch.bo, 270 bo, 0, 352 intelObj->mt->region->bo 404 gen7_create_constant_surface(struct brw_context *brw, drm_intel_bo *bo, uint32_t offset, int width, uint32_t *out_offset) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/nouveau/ |
H A D | nouveau_vbo_t.c | 91 nouveau_bo_ref(NULL, &a->bo); 268 struct nouveau_bo *bo, int *pdelta) 273 if (a->bo == bo) { 293 struct nouveau_bo *bo[NUM_VERTEX_ATTRS]; local 307 bo[i] = NULL; 311 nouveau_bo_ref(to_nouveau_bufferobj(obj)->bo, &bo[i]); 319 &bo[i], &offset[i]); 329 dirty |= check_update_array(a, offset[i], bo[ 267 check_update_array(struct nouveau_array *a, unsigned offset, struct nouveau_bo *bo, int *pdelta) argument [all...] |
/external/mesa3d/src/mesa/drivers/dri/r200/ |
H A D | r200_blit.c | 102 struct radeon_bo *bo, 152 if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 154 if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 292 OUT_BATCH_RELOC(offset, bo, offset, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 298 struct radeon_bo *bo, 335 if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 337 if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 351 OUT_BATCH_RELOC(offset, bo, offset, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 353 OUT_BATCH_RELOC(dst_pitch, bo, dst_pitch, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 516 "offset [%d x %d], format %s, bo 99 emit_tx_setup(struct r200_context *r200, gl_format src_mesa_format, gl_format dst_mesa_format, struct radeon_bo *bo, intptr_t offset, unsigned width, unsigned height, unsigned pitch) argument 297 emit_cb_setup(struct r200_context *r200, struct radeon_bo *bo, intptr_t offset, gl_format mesa_format, unsigned pitch, unsigned width, unsigned height) argument [all...] |
H A D | radeon_common_context.c | 352 struct radeon_bo *depth_bo = NULL, *bo; local 469 if (rb->bo) { 470 uint32_t name = radeon_gem_name_bo(rb->bo); 490 bo = depth_bo; 491 radeon_bo_ref(bo); 496 bo = radeon_bo_open(radeon->radeonScreen->bom, 503 if (bo == NULL) { 509 ret = radeon_bo_get_tiling(bo, &tiling_flags, &pitch); 514 radeon_bo_unref(bo); 515 bo [all...] |
H A D | radeon_dma.c | 144 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32); 148 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32); 155 radeon_bo_map(aos->bo, 1); 156 out = (uint32_t*)((char*)aos->bo->ptr + aos->offset); 166 radeon_bo_unmap(aos->bo); 182 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 ); 186 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32); 194 radeon_bo_map(aos->bo, 1); 195 out = (float*)((char*)aos->bo->ptr + aos->offset); 201 radeon_bo_unmap(aos->bo); 332 radeon_bo_is_idle(struct radeon_bo* bo) argument [all...] |
H A D | radeon_screen.h | 110 struct radeon_bo *bo; member in struct:__DRIimageRec
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
H A D | radeon_blit.c | 96 struct radeon_bo *bo, 143 if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 145 if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 170 OUT_BATCH_RELOC(offset, bo, offset, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 176 struct radeon_bo *bo, 211 if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 214 if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 226 OUT_BATCH_RELOC(offset, bo, offset, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 228 OUT_BATCH_RELOC(dst_pitch, bo, dst_pitch, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 394 "offset [%d x %d], format %s, bo 94 emit_tx_setup(struct r100_context *r100, gl_format mesa_format, struct radeon_bo *bo, intptr_t offset, unsigned width, unsigned height, unsigned pitch) argument 175 emit_cb_setup(struct r100_context *r100, struct radeon_bo *bo, intptr_t offset, gl_format mesa_format, unsigned pitch, unsigned width, unsigned height) argument [all...] |
H A D | radeon_common_context.c | 352 struct radeon_bo *depth_bo = NULL, *bo; local 469 if (rb->bo) { 470 uint32_t name = radeon_gem_name_bo(rb->bo); 490 bo = depth_bo; 491 radeon_bo_ref(bo); 496 bo = radeon_bo_open(radeon->radeonScreen->bom, 503 if (bo == NULL) { 509 ret = radeon_bo_get_tiling(bo, &tiling_flags, &pitch); 514 radeon_bo_unref(bo); 515 bo [all...] |
H A D | radeon_dma.c | 144 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32); 148 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32); 155 radeon_bo_map(aos->bo, 1); 156 out = (uint32_t*)((char*)aos->bo->ptr + aos->offset); 166 radeon_bo_unmap(aos->bo); 182 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 ); 186 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * count * 4, 32); 194 radeon_bo_map(aos->bo, 1); 195 out = (float*)((char*)aos->bo->ptr + aos->offset); 201 radeon_bo_unmap(aos->bo); 332 radeon_bo_is_idle(struct radeon_bo* bo) argument [all...] |
H A D | radeon_screen.h | 110 struct radeon_bo *bo; member in struct:__DRIimageRec
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/external/mesa3d/src/mesa/main/ |
H A D | texparam.c | 1139 const struct gl_buffer_object *bo = texObj->BufferObject; local 1144 if (!bo) { 1152 *params = bo->Name; 1155 *params = bo->Size;
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/external/mesa3d/src/mesa/tnl/ |
H A D | t_draw.c | 268 struct gl_buffer_object **bo, 282 bo[*nr_bo] = inputs[i]->BufferObj; 337 struct gl_buffer_object **bo, 352 bo[*nr_bo] = ib->obj; 400 struct gl_buffer_object **bo, 405 ctx->Driver.UnmapBuffer(ctx, bo[i]); 494 struct gl_buffer_object *bo[VERT_ATTRIB_MAX + 1]; local 520 bo, &nr_bo); 521 bind_indices(ctx, ib, bo, &nr_bo); 526 unmap_vbos(ctx, bo, nr_b 265 bind_inputs( struct gl_context *ctx, const struct gl_client_array *inputs[], GLint count, struct gl_buffer_object **bo, GLuint *nr_bo ) argument 335 bind_indices( struct gl_context *ctx, const struct _mesa_index_buffer *ib, struct gl_buffer_object **bo, GLuint *nr_bo) argument 399 unmap_vbos( struct gl_context *ctx, struct gl_buffer_object **bo, GLuint nr_bo ) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nouveau/ |
H A D | nouveau_buffer.c | 34 &buf->bo, &buf->offset); 35 if (!buf->bo) 40 &buf->bo, &buf->offset); 41 if (!buf->bo) 52 if (buf->bo) 53 buf->address = buf->bo->offset + buf->offset; 69 nouveau_bo_ref(NULL, &buf->bo); 119 buf->bo, buf->offset + start, NOUVEAU_BO_VRAM, size); 143 nv->push_cb(nv, buf->bo, buf->domain, buf->offset, buf->base.width0, 146 nv->push_data(nv, buf->bo, bu 255 struct nouveau_bo *bo = buf->bo; local 434 nouveau_buffer_data_fetch(struct nouveau_context *nv, struct nv04_resource *buf, struct nouveau_bo *bo, unsigned offset, unsigned size) argument 455 struct nouveau_bo *bo; local 595 struct nouveau_bo *bo; local 634 nouveau_scratch_data(struct nouveau_context *nv, const void *data, unsigned base, unsigned size, struct nouveau_bo **bo) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/ |
H A D | nv30_transfer.c | 150 { fp->bo, fp->domain | NOUVEAU_BO_RD }, 151 { src->bo, src->domain | NOUVEAU_BO_RD }, 152 { dst->bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR }, 205 PUSH_RELOC(push, dst->bo, dst->offset, NOUVEAU_BO_LOW, 0, 0); 284 PUSH_RELOC(push, fp->bo, fp->offset, fp->domain | 307 PUSH_RELOC(push, src->bo, src->offset, NOUVEAU_BO_LOW, 0, 0); 308 PUSH_RELOC(push, src->bo, texfmt, NOUVEAU_BO_OR, 402 { src->bo, src->domain | NOUVEAU_BO_RD }, 403 { dst->bo, dst->domain | NOUVEAU_BO_WR }, 439 PUSH_RELOC(push, dst->bo, 678 nv30_transfer_push_data(struct nouveau_context *nv, struct nouveau_bo *bo, unsigned offset, unsigned domain, unsigned size, void *data) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/ |
H A D | nv50_vbo.c | 204 struct nouveau_bo *bo; local 214 &bo); 217 NOUVEAU_BO_RD, bo); 246 struct nouveau_bo *bo; local 250 base, size, &bo); 252 BCTX_REFN_bo(nv50->bufctx_3d, VERTEX_TMP, bo_flags, bo); 598 nouveau_pushbuf_data(push, buf->bo, base + start * 4, count * 4); 607 nouveau_pushbuf_data(push, buf->bo, base + pb_start, pb_bytes); 619 nouveau_pushbuf_data(push, buf->bo, base + pb_start, pb_bytes);
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/ |
H A D | nvc0_vbo.c | 249 struct nouveau_bo *bo; local 253 base, size, &bo); 254 if (bo) 255 BCTX_REFN_bo(nvc0->bufctx_3d, VTX_TMP, bo_flags, bo); 276 struct nouveau_bo *bo; local 286 base, size, &bo); 287 if (bo) 288 BCTX_REFN_bo(nvc0->bufctx_3d, VTX_TMP, bo_flags, bo);
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H A D | nvc0_vbo_translate.c | 184 struct nouveau_bo *bo; local 188 void *const dest = nouveau_scratch_get(&nvc0->base, size, &va, &bo); 198 bo); 571 struct nouveau_bo *bo; local 582 info->count * index_size, &va, &bo); 585 bo);
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/external/chromium_org/third_party/mesa/src/src/gbm/backends/dri/ |
H A D | gbm_dri.c | 304 struct gbm_dri_bo *bo = gbm_dri_bo(_bo); local 306 if (bo->image != NULL) 309 memcpy(bo->map, buf, count); 318 struct gbm_dri_bo *bo = gbm_dri_bo(_bo); local 321 if (bo->image != NULL) { 322 dri->image->destroyImage(bo->image); 324 munmap(bo->map, bo->size); 326 arg.handle = bo->handle; 330 free(bo); 364 struct gbm_dri_bo *bo; local 459 struct gbm_dri_bo *bo; local 518 struct gbm_dri_bo *bo; local [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
H A D | intel_buffer_objects.c | 206 drm_intel_bo_references(intel->batch.bo, intel_obj->buffer); 210 /* Replace the current busy bo with fresh data. */ 256 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) { 328 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) { 491 if (!intel->upload.bo) 495 drm_intel_bo_subdata(intel->upload.bo, 502 drm_intel_bo_unreference(intel->upload.bo); 503 intel->upload.bo = NULL; 513 intel->upload.bo = drm_intel_bo_alloc(intel->bufmgr, "upload", size, 0); 525 if (intel->upload.bo 729 drm_intel_bo *bo = intel_bufferobj_buffer(intel, intel_obj, INTEL_READ); local [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
H A D | brw_draw_upload.c | 324 &buffer->bo, &buffer->offset); 337 &buffer->bo, &buffer->offset); 348 &buffer->bo, &buffer->offset); 430 buffer->bo = intel_bufferobj_source(intel, 433 drm_intel_bo_reference(buffer->bo); 454 assert(input->offset < brw->vb.buffers[input->buffer].bo->size); 541 if (brw->vb.current_buffers[i].handle != brw->vb.buffers[i].bo->handle || 558 drm_intel_bo_unreference(brw->vb.buffers[j].bo); 640 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset); 642 OUT_RELOC(buffer->bo, I915_GEM_DOMAIN_VERTE 796 drm_intel_bo *bo = NULL; local [all...] |
H A D | intel_buffer_objects.c | 206 drm_intel_bo_references(intel->batch.bo, intel_obj->buffer); 210 /* Replace the current busy bo with fresh data. */ 256 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) { 328 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) { 491 if (!intel->upload.bo) 495 drm_intel_bo_subdata(intel->upload.bo, 502 drm_intel_bo_unreference(intel->upload.bo); 503 intel->upload.bo = NULL; 513 intel->upload.bo = drm_intel_bo_alloc(intel->bufmgr, "upload", size, 0); 525 if (intel->upload.bo 729 drm_intel_bo *bo = intel_bufferobj_buffer(intel, intel_obj, INTEL_READ); local [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
H A D | intel_buffer_objects.c | 206 drm_intel_bo_references(intel->batch.bo, intel_obj->buffer); 210 /* Replace the current busy bo with fresh data. */ 256 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) { 328 if (drm_intel_bo_references(intel->batch.bo, intel_obj->buffer)) { 491 if (!intel->upload.bo) 495 drm_intel_bo_subdata(intel->upload.bo, 502 drm_intel_bo_unreference(intel->upload.bo); 503 intel->upload.bo = NULL; 513 intel->upload.bo = drm_intel_bo_alloc(intel->bufmgr, "upload", size, 0); 525 if (intel->upload.bo 729 drm_intel_bo *bo = intel_bufferobj_buffer(intel, intel_obj, INTEL_READ); local [all...] |