Searched refs:PTR (Results 26 - 50 of 123) sorted by relevance

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/external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/x86/
H A Dsubpixel_ssse3.asm48 movsxd rdx, DWORD PTR arg(5) ;table index
58 cmp esi, DWORD PTR [rax]
61 movdqa xmm4, XMMWORD PTR [rax] ;k0_k5
62 movdqa xmm5, XMMWORD PTR [rax+256] ;k2_k4
63 movdqa xmm6, XMMWORD PTR [rax+128] ;k1_k3
74 movq xmm0, MMWORD PTR [rsi - 2] ; -2 -1 0 1 2 3 4 5
76 movq xmm2, MMWORD PTR [rsi + 3] ; 3 4 5 6 7 8 9 10
117 movdqa xmm5, XMMWORD PTR [rax+256] ;k2_k4
118 movdqa xmm6, XMMWORD PTR [rax+128] ;k1_k3
120 movdqa xmm3, XMMWORD PTR [GLOBA
[all...]
H A Dsad_sse4.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 movq xmm1, MMWORD PTR [rdi]
18 movq xmm3, MMWORD PTR [rdi+8]
19 movq xmm2, MMWORD PTR [rdi+16]
37 movdqa xmm0, XMMWORD PTR [rsi]
38 movq xmm5, MMWORD PTR [rdi]
39 movq xmm3, MMWORD PTR [rdi+8]
40 movq xmm2, MMWORD PTR [rdi+16]
60 movdqa xmm0, XMMWORD PTR [rsi + rax]
61 movq xmm5, MMWORD PTR [rd
[all...]
H A Dsad_ssse3.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 lddqu xmm5, XMMWORD PTR [rdi]
18 lddqu xmm6, XMMWORD PTR [rdi+1]
19 lddqu xmm7, XMMWORD PTR [rdi+2]
25 movdqa xmm0, XMMWORD PTR [rsi]
26 lddqu xmm1, XMMWORD PTR [rdi]
27 lddqu xmm2, XMMWORD PTR [rdi+1]
28 lddqu xmm3, XMMWORD PTR [rdi+2]
38 movdqa xmm0, XMMWORD PTR [rsi+rax]
39 lddqu xmm1, XMMWORD PTR [rd
[all...]
H A Dsubpixel_sse2.asm60 movq xmm3, MMWORD PTR [rsi - 2]
61 movq xmm1, MMWORD PTR [rsi + 6]
77 pmullw xmm3, XMMWORD PTR [rdx] ; x[-2] * H[-2]; Tap 1
81 pmullw xmm4, XMMWORD PTR [rdx+16] ; x[-1] * H[-1]; Tap 2
181 movq xmm3, MMWORD PTR [rsi - 2]
182 movq xmm1, MMWORD PTR [rsi + 6]
184 movq xmm2, MMWORD PTR [rsi +14]
202 pmullw xmm3, XMMWORD PTR [rdx] ; x[-2] * H[-2]; Tap 1
206 pmullw xmm4, XMMWORD PTR [rdx+16] ; x[-1] * H[-1]; Tap 2
255 pmullw xmm3, XMMWORD PTR [rd
[all...]
/external/chromium_org/third_party/libvpx/source/libvpx/vpx_mem/memory_manager/include/
H A Dhmm_intrnl.h32 #define AAUS_FORWARD(PTR, AAU_OFFSET) \
33 (((char *) (PTR)) + ((AAU_OFFSET) * ((U(size_aau)) HMM_ADDR_ALIGN_UNIT)))
36 #define AAUS_BACKWARD(PTR, AAU_OFFSET) \
37 (((char *) (PTR)) - ((AAU_OFFSET) * ((U(size_aau)) HMM_ADDR_ALIGN_UNIT)))
40 #define BAUS_FORWARD(PTR, BAU_OFFSET) \
41 AAUS_FORWARD((PTR), (BAU_OFFSET) * ((U(size_aau)) HMM_BLOCK_ALIGN_UNIT))
44 #define BAUS_BACKWARD(PTR, BAU_OFFSET) \
45 AAUS_BACKWARD((PTR), (BAU_OFFSET) * ((U(size_aau)) HMM_BLOCK_ALIGN_UNIT))
/external/clang/test/CodeGen/
H A Ddebug-info.c11 typedef struct OPAQUE *PTR; typedef in typeref:struct:OPAQUE
12 PTR p;
/external/libvpx/libvpx/vp8/common/x86/
H A Dsubpixel_ssse3.asm48 movsxd rdx, DWORD PTR arg(5) ;table index
58 cmp esi, DWORD PTR [rax]
61 movdqa xmm4, XMMWORD PTR [rax] ;k0_k5
62 movdqa xmm5, XMMWORD PTR [rax+256] ;k2_k4
63 movdqa xmm6, XMMWORD PTR [rax+128] ;k1_k3
74 movq xmm0, MMWORD PTR [rsi - 2] ; -2 -1 0 1 2 3 4 5
76 movq xmm2, MMWORD PTR [rsi + 3] ; 3 4 5 6 7 8 9 10
117 movdqa xmm5, XMMWORD PTR [rax+256] ;k2_k4
118 movdqa xmm6, XMMWORD PTR [rax+128] ;k1_k3
120 movdqa xmm3, XMMWORD PTR [GLOBA
[all...]
H A Dsad_sse4.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 movq xmm1, MMWORD PTR [rdi]
18 movq xmm3, MMWORD PTR [rdi+8]
19 movq xmm2, MMWORD PTR [rdi+16]
37 movdqa xmm0, XMMWORD PTR [rsi]
38 movq xmm5, MMWORD PTR [rdi]
39 movq xmm3, MMWORD PTR [rdi+8]
40 movq xmm2, MMWORD PTR [rdi+16]
60 movdqa xmm0, XMMWORD PTR [rsi + rax]
61 movq xmm5, MMWORD PTR [rd
[all...]
H A Dsad_ssse3.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 lddqu xmm5, XMMWORD PTR [rdi]
18 lddqu xmm6, XMMWORD PTR [rdi+1]
19 lddqu xmm7, XMMWORD PTR [rdi+2]
25 movdqa xmm0, XMMWORD PTR [rsi]
26 lddqu xmm1, XMMWORD PTR [rdi]
27 lddqu xmm2, XMMWORD PTR [rdi+1]
28 lddqu xmm3, XMMWORD PTR [rdi+2]
38 movdqa xmm0, XMMWORD PTR [rsi+rax]
39 lddqu xmm1, XMMWORD PTR [rd
[all...]
/external/libvpx/libvpx/vpx_mem/memory_manager/include/
H A Dhmm_intrnl.h32 #define AAUS_FORWARD(PTR, AAU_OFFSET) \
33 (((char *) (PTR)) + ((AAU_OFFSET) * ((U(size_aau)) HMM_ADDR_ALIGN_UNIT)))
36 #define AAUS_BACKWARD(PTR, AAU_OFFSET) \
37 (((char *) (PTR)) - ((AAU_OFFSET) * ((U(size_aau)) HMM_ADDR_ALIGN_UNIT)))
40 #define BAUS_FORWARD(PTR, BAU_OFFSET) \
41 AAUS_FORWARD((PTR), (BAU_OFFSET) * ((U(size_aau)) HMM_BLOCK_ALIGN_UNIT))
44 #define BAUS_BACKWARD(PTR, BAU_OFFSET) \
45 AAUS_BACKWARD((PTR), (BAU_OFFSET) * ((U(size_aau)) HMM_BLOCK_ALIGN_UNIT))
/external/chromium_org/third_party/libvpx/source/libvpx/vp8/encoder/x86/
H A Ddct_mmx.asm94 pmaddwd mm1, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
95 pmaddwd mm4, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
97 pmaddwd mm3, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
98 pmaddwd mm5, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
100 paddd mm1, MMWORD PTR[GLOBAL(_14500)]
101 paddd mm4, MMWORD PTR[GLOBAL(_14500)]
102 paddd mm3, MMWORD PTR[GLOBAL(_7500)]
103 paddd mm5, MMWORD PTR[GLOBAL(_7500)]
152 pandn mm6, MMWORD PTR[GLOBAL(_cmp_mask)] ; clear upper,
161 paddw mm0, MMWORD PTR[GLOBA
[all...]
H A Ddct_sse2.asm69 movq xmm0, MMWORD PTR[input ] ;03 02 01 00
70 movq xmm2, MMWORD PTR[input+ pitch] ;13 12 11 10
72 movq xmm1, MMWORD PTR[input ] ;23 22 21 20
73 movq xmm3, MMWORD PTR[input+ pitch] ;33 32 31 30
94 pmaddwd xmm0, XMMWORD PTR[GLOBAL(_mult_add)] ;a1 + b1
95 pmaddwd xmm1, XMMWORD PTR[GLOBAL(_mult_sub)] ;a1 - b1
97 pmaddwd xmm3, XMMWORD PTR[GLOBAL(_5352_2217)] ;c1*2217 + d1*5352
98 pmaddwd xmm4, XMMWORD PTR[GLOBAL(_2217_neg5352)];d1*2217 - c1*5352
100 paddd xmm3, XMMWORD PTR[GLOBAL(_14500)]
101 paddd xmm4, XMMWORD PTR[GLOBA
[all...]
/external/libvpx/libvpx/vp8/encoder/x86/
H A Ddct_mmx.asm94 pmaddwd mm1, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
95 pmaddwd mm4, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
97 pmaddwd mm3, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
98 pmaddwd mm5, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
100 paddd mm1, MMWORD PTR[GLOBAL(_14500)]
101 paddd mm4, MMWORD PTR[GLOBAL(_14500)]
102 paddd mm3, MMWORD PTR[GLOBAL(_7500)]
103 paddd mm5, MMWORD PTR[GLOBAL(_7500)]
152 pandn mm6, MMWORD PTR[GLOBAL(_cmp_mask)] ; clear upper,
161 paddw mm0, MMWORD PTR[GLOBA
[all...]
H A Ddct_sse2.asm69 movq xmm0, MMWORD PTR[input ] ;03 02 01 00
70 movq xmm2, MMWORD PTR[input+ pitch] ;13 12 11 10
72 movq xmm1, MMWORD PTR[input ] ;23 22 21 20
73 movq xmm3, MMWORD PTR[input+ pitch] ;33 32 31 30
94 pmaddwd xmm0, XMMWORD PTR[GLOBAL(_mult_add)] ;a1 + b1
95 pmaddwd xmm1, XMMWORD PTR[GLOBAL(_mult_sub)] ;a1 - b1
97 pmaddwd xmm3, XMMWORD PTR[GLOBAL(_5352_2217)] ;c1*2217 + d1*5352
98 pmaddwd xmm4, XMMWORD PTR[GLOBAL(_2217_neg5352)];d1*2217 - c1*5352
100 paddd xmm3, XMMWORD PTR[GLOBAL(_14500)]
101 paddd xmm4, XMMWORD PTR[GLOBA
[all...]
/external/smack/src/org/xbill/DNS/
H A DPTRRecord.java24 * Creates a new PTR Record with the given data
29 super(name, Type.PTR, dclass, ttl, target, "target");
32 /** Gets the target of the PTR Record */
/external/chromium_org/third_party/boringssl/win-x86_64/crypto/
H A Dcpu-x86_64-asm.asm8 mov QWORD PTR[8+rsp],rdi ;WIN64 prologue
9 mov QWORD PTR[16+rsp],rsi
21 mov DWORD PTR[8+rdi],eax
103 mov DWORD PTR[8+rdi],ebx
145 and DWORD PTR[8+rdi],0ffffffdfh
147 mov DWORD PTR[4+rdi],r9d
148 mov DWORD PTR[rdi],r10d
150 mov rdi,QWORD PTR[8+rsp] ;WIN64 epilogue
151 mov rsi,QWORD PTR[16+rsp]
/external/clang/include/clang/AST/
H A DStmtVisitor.h35 #define PTR(CLASS) typename Ptr<CLASS>::type macro
37 return static_cast<ImplClass*>(this)->Visit ## NAME(static_cast<PTR(CLASS)>(S))
39 RetTy Visit(PTR(Stmt) S) {
44 if (PTR(BinaryOperator) BinOp = dyn_cast<BinaryOperator>(S)) {
81 } else if (PTR(UnaryOperator) UnOp = dyn_cast<UnaryOperator>(S)) {
112 RetTy Visit ## CLASS(PTR(CLASS) S) { DISPATCH(PARENT, PARENT); }
118 RetTy VisitBin ## NAME(PTR(BinaryOperator) S) { \
138 RetTy VisitBin ## NAME(PTR(CompoundAssignOperator) S) { \
150 RetTy VisitUnary ## NAME(PTR(UnaryOperator) S) { \
164 RetTy VisitStmt(PTR(Stm
166 #undef PTR macro
193 #define PTR macro
212 #undef PTR macro
[all...]
/external/chromium_org/third_party/libvpx/source/libvpx/vp9/encoder/x86/
H A Dvp9_sad_sse4.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 movq xmm1, MMWORD PTR [rdi]
18 movq xmm3, MMWORD PTR [rdi+8]
19 movq xmm2, MMWORD PTR [rdi+16]
37 movdqa xmm0, XMMWORD PTR [rsi]
38 movq xmm5, MMWORD PTR [rdi]
39 movq xmm3, MMWORD PTR [rdi+8]
40 movq xmm2, MMWORD PTR [rdi+16]
60 movdqa xmm0, XMMWORD PTR [rsi + rax]
61 movq xmm5, MMWORD PTR [rd
[all...]
H A Dvp9_sad_ssse3.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 lddqu xmm5, XMMWORD PTR [rdi]
18 lddqu xmm6, XMMWORD PTR [rdi+1]
19 lddqu xmm7, XMMWORD PTR [rdi+2]
25 movdqa xmm0, XMMWORD PTR [rsi]
26 lddqu xmm1, XMMWORD PTR [rdi]
27 lddqu xmm2, XMMWORD PTR [rdi+1]
28 lddqu xmm3, XMMWORD PTR [rdi+2]
38 movdqa xmm0, XMMWORD PTR [rsi+rax]
39 lddqu xmm1, XMMWORD PTR [rd
[all...]
/external/libvpx/libvpx/vp9/encoder/x86/
H A Dvp9_sad_sse4.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 movq xmm1, MMWORD PTR [rdi]
18 movq xmm3, MMWORD PTR [rdi+8]
19 movq xmm2, MMWORD PTR [rdi+16]
37 movdqa xmm0, XMMWORD PTR [rsi]
38 movq xmm5, MMWORD PTR [rdi]
39 movq xmm3, MMWORD PTR [rdi+8]
40 movq xmm2, MMWORD PTR [rdi+16]
60 movdqa xmm0, XMMWORD PTR [rsi + rax]
61 movq xmm5, MMWORD PTR [rd
[all...]
H A Dvp9_sad_ssse3.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 lddqu xmm5, XMMWORD PTR [rdi]
18 lddqu xmm6, XMMWORD PTR [rdi+1]
19 lddqu xmm7, XMMWORD PTR [rdi+2]
25 movdqa xmm0, XMMWORD PTR [rsi]
26 lddqu xmm1, XMMWORD PTR [rdi]
27 lddqu xmm2, XMMWORD PTR [rdi+1]
28 lddqu xmm3, XMMWORD PTR [rdi+2]
38 movdqa xmm0, XMMWORD PTR [rsi+rax]
39 lddqu xmm1, XMMWORD PTR [rd
[all...]
H A Dvp9_variance_impl_sse2.asm95 movsxd rax, DWORD PTR arg(1) ;[source_stride]
96 movsxd rdx, DWORD PTR arg(3) ;[recon_stride]
128 movdqu xmm1, XMMWORD PTR [rsi]
129 movdqu xmm2, XMMWORD PTR [rdi]
200 movd DWORD PTR [rax], xmm7
201 movd DWORD PTR [rdi], xmm1
240 movsxd rax, DWORD PTR arg(1) ;[source_stride]
241 movsxd rdx, DWORD PTR arg(3) ;[recon_stride]
246 movq xmm1, QWORD PTR [rsi]
247 movq xmm2, QWORD PTR [rd
[all...]
/external/deqp/framework/delibs/debase/
H A DdeMemory.h33 #define DE_DELETE(TYPE, PTR) deFree(PTR)
/external/llvm/test/MC/X86/
H A Dintel-syntax-encoding.s25 mov QWORD PTR [RSP - 16], RAX
59 movsd XMM5, QWORD PTR [-8]
H A Dintel-syntax.s9 mov DWORD PTR [RSP - 4], 257
11 mov DWORD PTR [RSP + 4], 258
13 mov QWORD PTR [RSP - 16], 123
15 mov BYTE PTR [RSP - 17], 97
17 mov EAX, DWORD PTR [RSP - 4]
19 mov RAX, QWORD PTR [RSP]
21 mov DWORD PTR [RSP - 4], -4
23 mov RCX, QWORD PTR [0]
25 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
27 mov BYTE PTR [RD
[all...]

Completed in 872 milliseconds

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