/external/smack/src/org/xbill/DNS/ |
H A D | HINFORecord.java | 17 private byte [] cpu, os; field in class:HINFORecord 28 * @param cpu A string describing the host's CPU 33 HINFORecord(Name name, int dclass, long ttl, String cpu, String os) { argument 36 this.cpu = byteArrayFromString(cpu); 46 cpu = in.readCountedString(); 53 cpu = byteArrayFromString(st.getString()); 66 return byteArrayToString(cpu, false); 79 out.writeCountedString(cpu); 89 sb.append(byteArrayToString(cpu, tru [all...] |
/external/scrypt/lib/crypto/ |
H A D | crypto_scrypt-neon.c | 31 #include <machine/cpu-features.h>
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/external/sepolicy/ |
H A D | file_contexts | 243 /sys/devices/system/cpu(/.*)? u:object_r:sysfs_devices_system_cpu:s0
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/external/skia/dm/ |
H A D | DMTask.cpp | 5 DEFINE_bool(cpu, true, "Master switch for running CPU-bound work.");
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/external/qemu/ |
H A D | cpu-exec.c | 20 #include "cpu.h" 48 bool qemu_cpu_has_work(CPUState *cpu) argument 50 return cpu_has_work(cpu); 72 /* XXX: restore cpu registers saved in host registers */ 225 CPUState *cpu = ENV_GET_CPU(env); local 227 if (!hax_enabled() || hax_vcpu_emulation_mode(cpu)) 228 return cpu->interrupt_request; 231 return cpu->interrupt_request; 241 CPUState *cpu = ENV_GET_CPU(env); local 243 if (cpu [all...] |
H A D | cpus.c | 26 #include "cpu.h" 29 #include "cpu.h" 46 CPUState *cpu; local 52 CPU_FOREACH(cpu) { 53 fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); 55 cpu_dump_state(cpu->env_ptr, stderr, fprintf, X86_DUMP_FPU); 57 cpu_dump_state(cpu->env_ptr, stderr, fprintf, 0); 76 CPUState *cpu = ENV_GET_CPU(env); local 77 if (cpu->stop) 79 if (cpu 86 CPUState *cpu; local 102 qemu_init_vcpu(CPUState *cpu) argument 113 qemu_cpu_is_self(CPUState *cpu) argument 126 qemu_cpu_kick(CPUState *cpu) argument 138 CPUState *cpu = current_cpu; local [all...] |
H A D | exec.c | 35 #include "cpu.h" 125 CPUState *cpu = ENV_GET_CPU(env); local 127 cpu_synchronize_state(cpu, 0); 129 qemu_put_be32s(f, &cpu->halted); 130 qemu_put_be32s(f, &cpu->interrupt_request); 136 CPUState *cpu = ENV_GET_CPU(env); local 141 qemu_get_be32s(f, &cpu->halted); 142 qemu_get_be32s(f, &cpu->interrupt_request); 145 cpu->interrupt_request &= ~0x01; 147 cpu_synchronize_state(cpu, 155 CPUState *cpu; local 166 CPUState *cpu = ENV_GET_CPU(env); local 383 cpu_single_step(CPUState *cpu, int enabled) argument 457 cpu_reset_interrupt(CPUState *cpu, int mask) argument 462 cpu_exit(CPUState *cpu) argument 470 CPUState *cpu = ENV_GET_CPU(env); local 559 CPUState *cpu; local 701 CPUState *cpu; local 1548 CPUState *cpu = current_cpu; local 2646 cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, void *buf, int len, int is_write) argument [all...] |
H A D | gdbstub.c | 1387 CPUState *cpu = ENV_GET_CPU(env); local 1392 for (r = cpu->gdb_regs; r; r = r->next) { 1403 CPUState *cpu = ENV_GET_CPU(env); local 1408 for (r = cpu->gdb_regs; r; r = r->next) { 1422 void gdb_register_coprocessor(CPUState *cpu, argument 1436 p = &cpu->gdb_regs; 1466 CPUState *cpu; local 1475 CPU_FOREACH(cpu) { 1476 err = cpu_breakpoint_insert(cpu->env_ptr, addr, BP_GDB, NULL); 1485 CPU_FOREACH(cpu) { 1500 CPUState *cpu; local 1533 CPUState *cpu; local 1573 gdb_id(CPUState *cpu) argument 1584 CPUState *cpu; local 1953 gdb_set_stop_cpu(CPUState *cpu) argument 1964 CPUState *cpu = ENV_GET_CPU(env); local 2163 gdb_handlesig(CPUState *cpu, int sig) argument 2212 gdb_exit(CPUState *cpu, int code) argument 2226 gdb_signalled(CPUState *cpu, int sig) argument [all...] |
/external/qemu/disas/ |
H A D | mips.c | 630 #define OPCODE_IS_MEMBER(insn, isa, cpu) \ 632 || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \ 633 || (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0) \ 634 || (cpu == CPU_RM9000 && ((insn)->membership & INSN_4650) != 0) \ 635 || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \ 636 || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \ 637 || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \ 638 || ((cpu == CPU_R10000 || cpu == CPU_R12000) \ 640 || (cpu [all...] |
/external/qemu/distrib/jpeg-6b/ |
H A D | armv6_idct.S | 63 #include <machine/cpu-features.h>
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H A D | config.guess | 373 long cpu = sysconf (_SC_CPU_VERSION); 377 if (CPU_IS_PA_RISC (cpu)) 379 switch (cpu) 387 else if (CPU_IS_HP_MC68K (cpu))
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H A D | jddctmgr.c | 26 #include <machine/cpu-features.h>
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/external/qemu/distrib/sdl-1.2.15/build-scripts/ |
H A D | config.guess | 619 long cpu = sysconf (_SC_CPU_VERSION); 621 switch (cpu) 679 long cpu = sysconf (_SC_CPU_VERSION); 683 if (CPU_IS_PA_RISC (cpu)) 685 switch (cpu) 693 else if (CPU_IS_HP_MC68K (cpu)) 858 case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in 939 case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in
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/external/qemu/hw/android/goldfish/ |
H A D | vmem.c | 29 int safe_memory_rw_debug(CPUState *cpu, target_ulong addr, uint8_t *buf, argument 34 kvm_get_sregs(cpu); 37 return cpu_memory_rw_debug(cpu, addr, buf, len, is_write); 40 hwaddr safe_get_phys_page_debug(CPUState *cpu, target_ulong addr) argument 42 CPUArchState *env = cpu->env_ptr; 46 kvm_get_sregs(cpu);
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/external/qemu/hw/arm/ |
H A D | arm_gic.c | 41 for per-cpu interrupts. This seems strange. */ 70 #define GIC_GET_PRIORITY(irq, cpu) \ 71 (((irq) < 32) ? s->priority1[irq][cpu] : s->priority2[(irq) - 32]) 109 int cpu; local 112 for (cpu = 0; cpu < NCPU; cpu++) { 113 cm = 1 << cpu; 114 s->current_pending[cpu] = 1023; 115 if (!s->enabled || !s->cpu_enabled[cpu]) { 142 gic_set_pending_private(gic_state *s, int cpu, int irq) argument 175 gic_set_running_irq(gic_state *s, int cpu, int irq) argument 186 gic_acknowledge_irq(gic_state *s, int cpu) argument 205 gic_complete_irq(gic_state * s, int cpu, int irq) argument 247 int cpu; local 380 int cpu; local 532 int cpu; local 574 gic_cpu_read(gic_state *s, int cpu, int offset) argument 596 gic_cpu_write(gic_state *s, int cpu, int offset, uint32_t value) argument [all...] |
H A D | pic.c | 28 CPUState *cpu = ENV_GET_CPU(env); local 32 cpu_interrupt(cpu, CPU_INTERRUPT_HARD); 34 cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); 38 cpu_interrupt(cpu, CPU_INTERRUPT_FIQ); 40 cpu_reset_interrupt(cpu, CPU_INTERRUPT_FIQ);
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/external/qemu/hw/core/ |
H A D | dma.c | 24 #include "cpu.h" 25 #include "exec/cpu-common.h" 452 CPUState *cpu = current_cpu; local 453 if (cpu) 454 cpu_exit(cpu);
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/external/qemu/hw/i386/ |
H A D | pc.c | 149 CPUState *cpu = first_cpu; local 150 CPUArchState *env = cpu->env_ptr; 153 while (cpu) { 156 cpu = QTAILQ_NEXT(cpu, node); 157 env = cpu ? cpu->env_ptr : NULL; 161 cpu_interrupt(cpu, CPU_INTERRUPT_HARD); 163 cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD);
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/external/qemu/hw/intc/ |
H A D | apic.c | 141 CPUState *cpu = ENV_GET_CPU(env); local 151 cpu_interrupt(cpu, CPU_INTERRUPT_SMI); 155 cpu_interrupt(cpu, CPU_INTERRUPT_NMI); 159 cpu_interrupt(cpu, CPU_INTERRUPT_HARD); 496 CPUState *cpu = ENV_GET_CPU(env); local 499 cpu_reset_interrupt(cpu, CPU_INTERRUPT_SIPI); 507 cpu->halted = 0;
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/external/qemu/hw/mips/ |
H A D | mips_int.c | 3 #include "cpu.h" 9 CPUState *cpu = ENV_GET_CPU(env); local 16 !(cpu->interrupt_request & CPU_INTERRUPT_HARD)) { 17 cpu_interrupt(cpu, CPU_INTERRUPT_HARD); 20 cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD);
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/external/qemu/include/exec/ |
H A D | cpu-all.h | 26 #include "exec/cpu-common.h" 30 * WORDS_ALIGNED : if defined, the host cpu can only make word aligned 33 * HOST_WORDS_BIGENDIAN : if defined, the host cpu is big endian and 36 * (TARGET_WORDS_ALIGNED : same for target cpu (not supported yet)) 38 * TARGET_WORDS_BIGENDIAN : same for target cpu 143 * (empty): target cpu endianness or 8 bit access 144 * r : reversed target cpu endianness (not implemented yet) 388 /* Several target-specific external hardware interrupts. Each target/cpu.h 398 originate from within the cpu itself, typically in response to some 442 void cpu_single_step(CPUState *cpu, in [all...] |
H A D | cpu-defs.h | 23 #error cpu.h included from common code 62 #define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */ 63 #define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */
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H A D | gdbstub.h | 14 #include "cpu.h" 31 void gdb_register_coprocessor(CPUState *cpu,
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H A D | hax.h | 7 #include "cpu.h" 16 int hax_init_vcpu(CPUState *cpu); 18 int hax_vcpu_exec(CPUState *cpu); 21 void hax_vcpu_sync_state(CPUState *cpu, int modified); 26 int hax_vcpu_emulation_mode(CPUState *cpu); 27 int hax_stop_emulation(CPUState *cpu); 28 int hax_stop_translate(CPUState *cpu); 29 int hax_arch_get_registers(CPUState *cpu); 30 void hax_raise_event(CPUState *cpu);
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/external/qemu/include/qemu/ |
H A D | log.h | 9 // TODO(digit): #include "qom/cpu.h" 79 * @cpu: The CPU whose state is to be logged. 84 static inline void log_cpu_state(CPUState *cpu, int flags) argument 87 cpu_dump_state(cpu, qemu_logfile, fprintf, flags); 93 * @cpu: The CPU whose state is to be logged. 98 static inline void log_cpu_state_mask(int mask, CPUState *cpu, int flags) argument 101 log_cpu_state(cpu, flags);
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