Searched refs:op (Results 1 - 25 of 30) sorted by relevance

12

/art/compiler/dex/quick/mips/
H A Dfp_mips.cc26 int op = kMipsNop; local
36 op = kMipsFadds;
40 op = kMipsFsubs;
44 op = kMipsFdivs;
48 op = kMipsFmuls;
66 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
72 int op = kMipsNop; local
78 op = kMipsFaddd;
82 op = kMipsFsubd;
86 op
118 int op = kMipsNop; local
[all...]
H A Dutility_mips.cc116 LIR* MipsMir2Lir::OpReg(OpKind op, RegStorage r_dest_src) { argument
118 switch (op) {
131 LIR* MipsMir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) { argument
137 switch (op) {
139 return OpRegRegImm(op, r_dest_src1, r_dest_src1, value);
142 return OpRegRegImm(op, r_dest_src1, r_dest_src1, value);
153 if (op == kOpCmp)
161 LIR* MipsMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) { argument
163 switch (op) {
202 LIR* MipsMir2Lir::OpRegRegImm(OpKind op, RegStorag argument
285 OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) argument
339 OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) argument
683 OpMem(OpKind op, RegStorage r_base, int disp) argument
693 InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) argument
[all...]
H A Dcodegen_mips.h144 LIR* OpMem(OpKind op, RegStorage r_base, int disp);
146 LIR* OpReg(OpKind op, RegStorage r_dest_src);
149 LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value);
150 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
153 LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src);
154 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value);
155 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
182 LIR* InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) OVERRIDE;
/art/compiler/dex/quick/arm64/
H A Dfp_arm64.cc26 int op = kA64Brk1d; local
32 op = kA64Fadd3fff;
36 op = kA64Fsub3fff;
40 op = kA64Fdiv3fff;
44 op = kA64Fmul3fff;
62 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
68 int op = kA64Brk1d; local
74 op = kA64Fadd3fff;
78 op = kA64Fsub3fff;
82 op
121 int op = kA64Brk1d; local
439 int op = (is_min) ? kA64Fmin3fff : kA64Fmax3fff; local
[all...]
H A Dutility_arm64.cc489 ArmOpcode op; local
495 op = WIDE(kA64Movn3rdM);
498 op = WIDE(kA64Movz3rdM);
507 res = NewLIR3(op, r_dest.GetReg(), halfword ^ background, shift);
550 LIR* Arm64Mir2Lir::OpReg(OpKind op, RegStorage r_dest_src) { argument
552 switch (op) {
561 LOG(FATAL) << "Bad opcode " << op;
566 LIR* Arm64Mir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift) { argument
571 switch (op) {
616 return OpRegRegRegShift(op, r_dest_src
634 OpRegRegExtend(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, A64RegExtEncodings ext, uint8_t amount) argument
669 OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) argument
690 OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) argument
695 OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2, int shift) argument
763 OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2, A64RegExtEncodings ext, uint8_t amount) argument
801 OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) argument
805 OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) argument
809 OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1, int64_t value) argument
935 OpRegImm(OpKind op, RegStorage r_dest_src1, int value) argument
939 OpRegImm64(OpKind op, RegStorage r_dest_src1, int64_t value) argument
1397 OpMem(OpKind op, RegStorage r_base, int disp) argument
1402 InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) argument
[all...]
H A Darm64_lir.h374 #define WIDE(op) ((ArmOpcode)((op) | kA64Wide))
375 #define UNWIDE(op) ((ArmOpcode)((op) & ~kA64Wide))
378 #define IS_WIDE(op) (((op) & kA64Wide) != 0)
H A Dcodegen_arm64.h212 LIR* OpMem(OpKind op, RegStorage r_base, int disp) OVERRIDE;
214 LIR* OpReg(OpKind op, RegStorage r_dest_src) OVERRIDE;
217 LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value) OVERRIDE;
218 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
221 LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) OVERRIDE;
222 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) OVERRIDE;
223 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
260 LIR* InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) OVERRIDE;
362 void GenLongOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
364 LIR* OpRegImm64(OpKind op, RegStorag
[all...]
H A Dint_arm64.cc65 OpKind op = kOpBkpt; local
69 op = kOpLsl;
73 op = kOpAsr;
77 op = kOpLsr;
85 OpRegRegReg(op, rl_result.reg, rl_src1.reg, As64BitReg(rl_shift.reg));
945 // TODO: might be best to add a new op, kOpSubs, and handle it generically.
1021 void Arm64Mir2Lir::GenLongOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1, argument
1028 OpRegRegRegShift(op, rl_result.reg, rl_src1.reg, rl_src2.reg, ENCODE_NO_SHIFT);
1093 LOG(FATAL) << "Invalid long arith op";
1297 OpKind op local
1329 OpKind op = kOpBkpt; local
[all...]
/art/compiler/dex/quick/x86/
H A Dutility_x86.cc120 LIR* X86Mir2Lir::OpReg(OpKind op, RegStorage r_dest_src) { argument
122 switch (op) {
128 LOG(FATAL) << "Bad case in OpReg " << op;
133 LIR* X86Mir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) { argument
138 switch (op) {
146 LOG(FATAL) << "Bad case in OpRegImm (64-bit) " << op;
149 switch (op) {
189 LOG(FATAL) << "Bad case in OpRegImm " << op;
195 LIR* X86Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { argument
199 switch (op) {
356 OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) argument
364 OpRegMem(OpKind op, RegStorage r_dest, RegStorage r_base, int offset) argument
392 OpMemReg(OpKind op, RegLocation rl_dest, int r_value) argument
420 OpRegMem(OpKind op, RegStorage r_dest, RegLocation rl_value) argument
445 OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) argument
497 OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src, int value) argument
523 OpThreadMem(OpKind op, ThreadOffset<4> thread_offset) argument
536 OpThreadMem(OpKind op, ThreadOffset<8> thread_offset) argument
549 OpMem(OpKind op, RegStorage r_base, int disp) argument
1078 InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) argument
[all...]
H A Dint_x86.cc1364 LOG(FATAL) << "Invalid long arith op";
1583 Instruction::Code op) {
1585 X86OpCode x86op = GetOpcode(op, rl_dest, rl_src, false);
1601 x86op = GetOpcode(op, rl_dest, rl_src, true);
1620 x86op = GetOpcode(op, rl_dest, rl_src, true);
1627 void X86Mir2Lir::GenLongArith(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op) { argument
1634 GenLongRegOrMemOp(rl_result, rl_src, op);
1645 X86OpCode x86op = GetOpcode(op, rl_dest, rl_src, false);
1657 x86op = GetOpcode(op, rl_dest, rl_src, true);
1677 RegLocation rl_src2, Instruction::Code op,
1582 GenLongRegOrMemOp(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op) argument
1676 GenLongArith(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, Instruction::Code op, bool is_commutative) argument
2022 OpRegThreadMem(OpKind op, RegStorage r_dest, ThreadOffset<4> thread_offset) argument
2035 OpRegThreadMem(OpKind op, RegStorage r_dest, ThreadOffset<8> thread_offset) argument
2171 OpKind op = static_cast<OpKind>(0); /* Make gcc happy */ local
2325 IsNoOp(Instruction::Code op, int32_t value) argument
2340 GetOpcode(Instruction::Code op, RegLocation dest, RegLocation rhs, bool is_high_op) argument
2396 GetOpcode(Instruction::Code op, RegLocation loc, bool is_high_op, int32_t value) argument
2469 GenLongImm(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op) argument
2553 GenLongLongImm(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, Instruction::Code op) argument
2694 OpKind op = kOpBkpt; local
2975 OpKind op = kOpBkpt; local
[all...]
H A Dcodegen_x86.h185 * @param op Opcode to be generated
188 bool GenLongImm(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
195 * @param op Opcode to be generated
199 Instruction::Code op);
205 * @param op The DEX opcode for the operation.
209 Instruction::Code op, bool is_commutative);
215 * @param op The DEX opcode for the operation.
217 void GenLongArith(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
223 * @param op The DEX opcode for the operation.
225 virtual void GenLongRegOrMemOp(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
[all...]
H A Dfp_x86.cc26 X86OpCode op = kX86Nop; local
36 op = kX86AddssRR;
40 op = kX86SubssRR;
44 op = kX86DivssRR;
48 op = kX86MulssRR;
71 NewLIR2(op, r_dest.GetReg(), r_src2.GetReg());
83 X86OpCode op = kX86Nop; local
89 op = kX86AddsdRR;
93 op = kX86SubsdRR;
97 op
196 X86OpCode op = kX86Nop; local
[all...]
/art/compiler/dex/quick/arm/
H A Dfp_arm.cc25 int op = kThumbBkpt; local
35 op = kThumb2Vadds;
39 op = kThumb2Vsubs;
43 op = kThumb2Vdivs;
47 op = kThumb2Vmuls;
65 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg());
71 int op = kThumbBkpt; local
77 op = kThumb2Vaddd;
81 op = kThumb2Vsubd;
85 op
117 int op = kThumbBkpt; local
[all...]
H A Dcodegen_arm.h147 LIR* OpMem(OpKind op, RegStorage r_base, int disp);
149 LIR* OpReg(OpKind op, RegStorage r_dest_src);
152 LIR* OpRegImm(OpKind op, RegStorage r_dest_src1, int value);
153 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
156 LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src);
157 LIR* OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value);
158 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
166 LIR* OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2,
168 LIR* OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift);
187 LIR* InvokeTrampoline(OpKind op, RegStorag
207 OpKind op; member in struct:art::FINAL::__anon10
[all...]
H A Dutility_arm.cc223 LIR* ArmMir2Lir::OpReg(OpKind op, RegStorage r_dest_src) { argument
225 switch (op) {
233 LOG(FATAL) << "Bad opcode " << op;
238 LIR* ArmMir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, argument
243 switch (op) {
351 LOG(FATAL) << "Bad opcode: " << op;
371 LIR* ArmMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) { argument
372 return OpRegRegShift(op, r_dest_src1, r_src2, 0);
385 LIR* ArmMir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { argument
390 LIR* ArmMir2Lir::OpRegRegRegShift(OpKind op, RegStorag argument
459 OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) argument
463 OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) argument
600 OpRegImm(OpKind op, RegStorage r_dest_src1, int value) argument
1161 OpMem(OpKind op, RegStorage r_base, int disp) argument
1166 InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) argument
[all...]
H A Dint_arm.cc552 bool ArmMir2Lir::GetEasyMultiplyOp(int lit, ArmMir2Lir::EasyMultiplyOp* op) { argument
557 op->op = kOpInvalid;
562 op->op = kOpLsl;
563 op->shift = LowestSetBit(lit);
568 op->op = kOpAdd;
569 op->shift = LowestSetBit(lit - 1);
574 op
[all...]
/art/test/004-ThreadStress/src/
H A DMain.java71 for (Operation op : Operation.values()) {
72 operationCount += op.frequency;
87 for (Operation op : Operation.values()) {
88 for (int f = 0; f < op.frequency; f++) {
92 operations[o] = op;
118 for (Operation op : Operation.values()) {
119 System.out.println(op + " = " + distribution.get(op));
/art/test/701-easy-div-rem/
H A DgenMain.py57 for op, op_name in (('/', 'Div'), ('%', 'Rem')):
58 local_vars['@OP@'] = op
/art/compiler/dex/
H A Dglobal_value_numbering.h79 static uint64_t BuildKey(uint16_t op, uint16_t operand1, uint16_t operand2, uint16_t modifier) { argument
80 return (static_cast<uint64_t>(op) << 48 | static_cast<uint64_t>(operand1) << 32 |
85 uint16_t LookupValue(uint16_t op, uint16_t operand1, uint16_t operand2, uint16_t modifier) { argument
87 uint64_t key = BuildKey(op, operand1, operand2, modifier);
99 bool HasValue(uint16_t op, uint16_t operand1, uint16_t operand2, uint16_t modifier, argument
103 // This is equivalent to value == LookupValue(op, operand1, operand2, modifier)
105 uint64_t key = BuildKey(op, operand1, operand2, modifier);
/art/disassembler/
H A Ddisassembler_arm.cc269 uint32_t op = (instruction >> 21) & 0xf; local
270 opcode = kDataProcessingOperations[op];
271 bool implicit_s = ((op & ~3) == 8); // TST, TEQ, CMP, and CMN.
272 bool is_mov = op == 0b1101 || op == 0b1111;
400 uint64_t AdvSIMDExpand(uint32_t op, uint32_t cmode, uint32_t imm8) { argument
401 CHECK_EQ(op & 1, op);
421 if ((cmode & 1) == 0 && op == 0) {
424 } else if ((cmode & 1) == 0 && op !
473 uint32_t op = (instr >> 23) & 3; local
895 uint32_t op = (instr >> 7) & 1; local
979 uint32_t op = op3 & 1; local
1838 uint16_t op = (instr >> 11) & 1; local
1851 uint16_t op = (instr >> 6) & 3; local
[all...]
H A Ddisassembler_mips.cc183 uint32_t op = (instruction >> 26) & 0x3f; local
185 opcode = StringPrintf("op=%d fn=%d", op, function);
/art/compiler/dex/quick/
H A Dgen_common.cc37 * and "op" calls may be used here.
330 OpKind op = kOpInvalid; local
333 op = kOp2Byte;
336 op = kOp2Short;
339 op = kOp2Char;
344 OpRegReg(op, rl_result.reg, rl_src.reg);
519 // Copy helper's result into r_base, a no-op on all but MIPS.
1424 OpKind op = kOpBkpt; local
1432 op = kOpNeg;
1436 op
1684 OpKind op = static_cast<OpKind>(0); /* Make gcc happy */ local
[all...]
/art/compiler/dex/portable/
H A Dmir_to_gbc.h123 ::llvm::Value* GenArithOp(OpKind op, bool is_long, ::llvm::Value* src1,
125 void ConvertFPArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
131 void ConvertArithOp(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
133 void ConvertArithOpLit(OpKind op, RegLocation rl_dest, RegLocation rl_src1,
/art/runtime/base/
H A Dmutex-inl.h42 static inline int futex(volatile int *uaddr, int op, int val, const struct timespec *timeout, volatile int *uaddr2, int val3) { argument
43 return syscall(SYS_futex, uaddr, op, val, timeout, uaddr2, val3);
/art/runtime/
H A Dtransaction.h146 InternStringLog(mirror::String* s, StringKind kind, StringOp op) argument
147 : str_(s), string_kind_(kind), string_op_(op) {

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