Searched refs:CP0_SRSConf1 (Results 1 - 5 of 5) sorted by relevance

/external/qemu/target-mips/
H A Dmachine.c106 qemu_put_sbe32s(f, &env->CP0_SRSConf1);
257 qemu_get_sbe32s(f, &env->CP0_SRSConf1);
H A Dtranslate_init.c86 int32_t CP0_SRSConf1; member in struct:mips_def_t
293 .CP0_SRSConf1 = (1 << CP0SRSC1_M) | (0x3fe << CP0SRSC1_SRS6) |
H A Dcpu.h248 int32_t CP0_SRSConf1; member in struct:CPUMIPSState
H A Dtranslate.c3083 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf1));
4253 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf1));
8659 env->CP0_SRSConf1 = env->cpu_model->CP0_SRSConf1;
H A Dop_helper.c1287 env->CP0_SRSConf1 |= arg1 & env->CP0_SRSConf1_rw_bitmask;

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