Searched refs:CP0_SRSConf2 (Results 1 - 5 of 5) sorted by relevance

/external/qemu/target-mips/
H A Dmachine.c107 qemu_put_sbe32s(f, &env->CP0_SRSConf2);
258 qemu_get_sbe32s(f, &env->CP0_SRSConf2);
H A Dtranslate_init.c88 int32_t CP0_SRSConf2; member in struct:mips_def_t
296 .CP0_SRSConf2 = (1 << CP0SRSC2_M) | (0x3fe << CP0SRSC2_SRS9) |
H A Dcpu.h254 int32_t CP0_SRSConf2; member in struct:CPUMIPSState
H A Dtranslate.c3088 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf2));
4258 gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_SRSConf2));
8661 env->CP0_SRSConf2 = env->cpu_model->CP0_SRSConf2;
H A Dop_helper.c1292 env->CP0_SRSConf2 |= arg1 & env->CP0_SRSConf2_rw_bitmask;

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