Searched refs:DCM (Results 1 - 4 of 4) sorted by relevance
/external/valgrind/main/none/tests/ppc32/ |
H A D | test_dfp4.c | 85 /* In _test_dtstdc[q], DCM can be one of 6 possible data classes, numbered 0-5. 86 * In reality, DCM is a 6-bit mask field. We just test the individual values 91 static void _test_dtstdc(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused))) argument 94 if (DCM < 0 || DCM > 5 || !(BF == 0 || BF == 5)) { 95 fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DCM); 98 switch (DCM) { 140 static void _test_dtstdcq(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused))) argument 143 if (DCM < 0 || DCM > [all...] |
/external/valgrind/main/none/tests/ppc64/ |
H A D | test_dfp4.c | 85 /* In _test_dtstdc[q], DCM can be one of 6 possible data classes, numbered 0-5. 86 * In reality, DCM is a 6-bit mask field. We just test the individual values 91 static void _test_dtstdc(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused))) argument 94 if (DCM < 0 || DCM > 5 || !(BF == 0 || BF == 5)) { 95 fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DCM); 98 switch (DCM) { 140 static void _test_dtstdcq(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused))) argument 143 if (DCM < 0 || DCM > [all...] |
/external/qemu/disas/ |
H A D | ppc.c | 885 /* The DCM and DGM fields in a Z form instruction. */ 886 #define DCM SH16 887 #define DGM DCM 4771 { "dtstdc", Z(59,194), Z_MASK, POWER6, { BF, FRA, DCM } }, 4955 { "dtstdcq", Z(63,194), Z_MASK, POWER6, { BF, FRA, DCM } }, 882 #define DCM macro
|
/external/valgrind/main/VEX/priv/ |
H A D | guest_ppc_toIR.c | 10826 UInt DCM = IFIELD( theInstr, 10, 6 ); local 10890 crfD, frA_addr, DCM); 10926 crfD, frA_addr, DCM); 11073 /* Calculate the DCM bit field based on the tests for the specific 11077 /* DCM[0:5] Bit Data Class definition 11132 /* DCM[0:5] Bit Data Class definition 11206 /* create DCM field */ 11250 mkU32( DCM ),
|
Completed in 1719 milliseconds