| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 225 { OP_CVT, 0x1, 0x1, 0x0, 0x8, 0x1, 0x0 },
476 case OP_CVT:
514 if (insn->op == OP_CVT)
592 case OP_CVT:
622 case OP_CVT:
|
| H A D | nv50_ir_lowering_nvc0.cpp | 492 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
660 bld.mkCvt(OP_CVT, TYPE_U16, layer, sTy, src)->saturate = sat;
717 bld.mkCvt(OP_CVT, TYPE_U16, src, sTy, arrayIndex)->saturate = sat;
|
| H A D | nv50_ir_emit_nvc0.cpp | 1664 case OP_CVT:
1805 if (i->op == OP_CVT)
|
| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 225 { OP_CVT, 0x1, 0x1, 0x0, 0x8, 0x1, 0x0 },
476 case OP_CVT:
514 if (insn->op == OP_CVT)
592 case OP_CVT:
622 case OP_CVT:
|
| H A D | nv50_ir_lowering_nvc0.cpp | 492 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
660 bld.mkCvt(OP_CVT, TYPE_U16, layer, sTy, src)->saturate = sat;
717 bld.mkCvt(OP_CVT, TYPE_U16, src, sTy, arrayIndex)->saturate = sat;
|
| H A D | nv50_ir_emit_nvc0.cpp | 1664 case OP_CVT:
1805 if (i->op == OP_CVT)
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_lowering_nv50.cpp | 170 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
399 bld.mkCvt(OP_CVT, TYPE_F32, af, ty, div->getSrc(0));
400 bld.mkCvt(OP_CVT, TYPE_F32, bf, ty, div->getSrc(1));
418 bld.mkCvt(OP_CVT, ty, (q0 = bld.getSSA()), TYPE_F32, qf)->rnd = ROUND_Z;
425 bld.mkCvt(OP_CVT, TYPE_F32, (aR = bld.getSSA()), TYPE_U32, aRf);
428 bld.mkCvt(OP_CVT, TYPE_U32, (qR = bld.getSSA()), TYPE_F32, qRf)
593 bld.mkCvt(OP_CVT, TYPE_U32, src, TYPE_F32, layer);
662 bld.mkCvt(OP_CVT, TYPE_U8, flags, TYPE_U32, cond->getDef(0));
791 bld.mkCvt(OP_CVT, TYPE_F32, i->getDef(0), TYPE_S32, i->getDef(0));
924 bld.mkCvt(OP_CVT, TYPE_U3
[all...] |
| H A D | nv50_ir_from_sm4.cpp | 381 case SM4_OPCODE_FRC: return OP_CVT;
382 case SM4_OPCODE_FTOI: return OP_CVT;
383 case SM4_OPCODE_FTOU: return OP_CVT;
398 case SM4_OPCODE_ITOF: return OP_CVT;
417 case SM4_OPCODE_ROUND_NE: return OP_CVT;
439 case SM4_OPCODE_UTOF: return OP_CVT;
459 case SM4_OPCODE_F32TOF16: return OP_CVT;
460 case SM4_OPCODE_F16TOF32: return OP_CVT;
486 case SM4_OPCODE_DTOF: return OP_CVT;
487 case SM4_OPCODE_FTOD: return OP_CVT;
[all...] |
| H A D | nv50_ir_target_nv50.cpp | 93 { OP_CVT, 0x1, 0x1, 0x0, 0x8, 0x0, 0x1, 0x1, 0x0 },
411 case OP_CVT:
454 if (insn->op == OP_CVT)
|
| H A D | nv50_ir_peephole.cpp | 301 case OP_CVT:
384 return OP_CVT;
640 if (i->op != OP_CVT)
668 if (i->op != OP_CVT)
1067 minmax->op = OP_CVT;
1189 if (insn && insn->op == OP_CVT &&
1239 case OP_CVT:
|
| H A D | nv50_ir_from_tgsi.cpp | 1816 mkCvt(OP_CVT, TYPE_S32, dst0[c], TYPE_F32, src0)->rnd = ROUND_M;
1984 mkCvt(OP_CVT, TYPE_F32, dst0[c], TYPE_F32, fetchSrc(0, c))
2056 mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c))->rnd = ROUND_Z;
2061 mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c));
|
| H A D | nv50_ir.h | 73 OP_CVT, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_ra.cpp | 1447 st = new_Instruction(func, OP_CVT, ty);
1466 ld = new_Instruction(func, OP_CVT, ty);
|
| H A D | nv50_ir_emit_nv50.cpp | 1613 case OP_CVT:
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_lowering_nv50.cpp | 170 i->op == OP_CVT || i->op == OP_MIN || i->op == OP_MAX ||
399 bld.mkCvt(OP_CVT, TYPE_F32, af, ty, div->getSrc(0));
400 bld.mkCvt(OP_CVT, TYPE_F32, bf, ty, div->getSrc(1));
418 bld.mkCvt(OP_CVT, ty, (q0 = bld.getSSA()), TYPE_F32, qf)->rnd = ROUND_Z;
425 bld.mkCvt(OP_CVT, TYPE_F32, (aR = bld.getSSA()), TYPE_U32, aRf);
428 bld.mkCvt(OP_CVT, TYPE_U32, (qR = bld.getSSA()), TYPE_F32, qRf)
593 bld.mkCvt(OP_CVT, TYPE_U32, src, TYPE_F32, layer);
662 bld.mkCvt(OP_CVT, TYPE_U8, flags, TYPE_U32, cond->getDef(0));
791 bld.mkCvt(OP_CVT, TYPE_F32, i->getDef(0), TYPE_S32, i->getDef(0));
924 bld.mkCvt(OP_CVT, TYPE_U3
[all...] |
| H A D | nv50_ir_from_sm4.cpp | 381 case SM4_OPCODE_FRC: return OP_CVT;
382 case SM4_OPCODE_FTOI: return OP_CVT;
383 case SM4_OPCODE_FTOU: return OP_CVT;
398 case SM4_OPCODE_ITOF: return OP_CVT;
417 case SM4_OPCODE_ROUND_NE: return OP_CVT;
439 case SM4_OPCODE_UTOF: return OP_CVT;
459 case SM4_OPCODE_F32TOF16: return OP_CVT;
460 case SM4_OPCODE_F16TOF32: return OP_CVT;
486 case SM4_OPCODE_DTOF: return OP_CVT;
487 case SM4_OPCODE_FTOD: return OP_CVT;
[all...] |
| H A D | nv50_ir_target_nv50.cpp | 93 { OP_CVT, 0x1, 0x1, 0x0, 0x8, 0x0, 0x1, 0x1, 0x0 },
411 case OP_CVT:
454 if (insn->op == OP_CVT)
|
| H A D | nv50_ir_peephole.cpp | 301 case OP_CVT:
384 return OP_CVT;
640 if (i->op != OP_CVT)
668 if (i->op != OP_CVT)
1067 minmax->op = OP_CVT;
1189 if (insn && insn->op == OP_CVT &&
1239 case OP_CVT:
|
| H A D | nv50_ir_from_tgsi.cpp | 1816 mkCvt(OP_CVT, TYPE_S32, dst0[c], TYPE_F32, src0)->rnd = ROUND_M;
1984 mkCvt(OP_CVT, TYPE_F32, dst0[c], TYPE_F32, fetchSrc(0, c))
2056 mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c))->rnd = ROUND_Z;
2061 mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c));
|
| H A D | nv50_ir.h | 73 OP_CVT, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_ra.cpp | 1447 st = new_Instruction(func, OP_CVT, ty);
1466 ld = new_Instruction(func, OP_CVT, ty);
|
| H A D | nv50_ir_emit_nv50.cpp | 1613 case OP_CVT:
|