Searched refs:OP_LOAD (Results 1 - 22 of 22) sorted by relevance
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_peephole.cpp | 132 return ld && ld->op == OP_LOAD && ld->src(0).getFile() == FILE_MEMORY_CONST;
148 (ld->op == OP_LOAD &&
208 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV))
1491 if (insn->op == OP_LOAD || insn->op == OP_VFETCH)
1517 if (it->locked && insn->op != OP_LOAD)
1719 if (ldst->op == OP_LOAD || ldst->op == OP_VFETCH) {
1816 if (ld->op != OP_MOV && ld->op != OP_LOAD)
1942 ((insn->op != OP_LOAD && insn->op != OP_STORE) ||
2113 if (op == OP_LOAD || op == OP_VFETCH) {
2283 if (i->defExists(1) && (i->op == OP_VFETCH || i->op == OP_LOAD)) {
[all...] |
| H A D | nv50_ir_build_util.cpp | 109 Instruction *insn = new_Instruction(func, OP_LOAD, ty);
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| H A D | nv50_ir_target_nv50.cpp | 464 if (i->op == OP_LOAD) {
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| H A D | nv50_ir.h | 49 OP_LOAD, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_ra.cpp | 1464 ld = new_Instruction(func, OP_LOAD, ty);
1923 if (i->op == OP_LOAD || i->op == OP_VFETCH) {
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| H A D | nv50_ir_lowering_nv50.cpp | 922 bld.mkOp1(OP_LOAD, TYPE_U16, x,
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| H A D | nv50_ir_emit_nv50.cpp | 1547 case OP_LOAD:
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| H A D | nv50_ir_from_sm4.cpp | 551 case SM4_TARGET_RAW_BUFFER: *opr = OP_LOAD; break;
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_peephole.cpp | 132 return ld && ld->op == OP_LOAD && ld->src(0).getFile() == FILE_MEMORY_CONST;
148 (ld->op == OP_LOAD &&
208 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV))
1491 if (insn->op == OP_LOAD || insn->op == OP_VFETCH)
1517 if (it->locked && insn->op != OP_LOAD)
1719 if (ldst->op == OP_LOAD || ldst->op == OP_VFETCH) {
1816 if (ld->op != OP_MOV && ld->op != OP_LOAD)
1942 ((insn->op != OP_LOAD && insn->op != OP_STORE) ||
2113 if (op == OP_LOAD || op == OP_VFETCH) {
2283 if (i->defExists(1) && (i->op == OP_VFETCH || i->op == OP_LOAD)) {
[all...] |
| H A D | nv50_ir_build_util.cpp | 109 Instruction *insn = new_Instruction(func, OP_LOAD, ty);
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| H A D | nv50_ir_target_nv50.cpp | 464 if (i->op == OP_LOAD) {
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| H A D | nv50_ir.h | 49 OP_LOAD, enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_ra.cpp | 1464 ld = new_Instruction(func, OP_LOAD, ty);
1923 if (i->op == OP_LOAD || i->op == OP_VFETCH) {
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| H A D | nv50_ir_lowering_nv50.cpp | 922 bld.mkOp1(OP_LOAD, TYPE_U16, x,
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| H A D | nv50_ir_emit_nv50.cpp | 1547 case OP_LOAD:
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| H A D | nv50_ir_from_sm4.cpp | 551 case SM4_TARGET_RAW_BUFFER: *opr = OP_LOAD; break;
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 404 // indirect loads can only be done by OP_LOAD/VFETCH/INTERP on nvc0
549 case OP_LOAD:
563 if (i->op == OP_LOAD) {
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| H A D | nv50_ir_lowering_nvc0.cpp | 1091 case OP_LOAD:
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| H A D | nv50_ir_emit_nvc0.cpp | 1581 case OP_LOAD:
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| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_target_nvc0.cpp | 404 // indirect loads can only be done by OP_LOAD/VFETCH/INTERP on nvc0
549 case OP_LOAD:
563 if (i->op == OP_LOAD) {
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| H A D | nv50_ir_lowering_nvc0.cpp | 1091 case OP_LOAD:
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| H A D | nv50_ir_emit_nvc0.cpp | 1581 case OP_LOAD:
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