Searched refs:PMEVCNTR5_EL0 (Results 1 - 3 of 3) sorted by relevance
/external/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 474 {"pmevcntr5_el0", PMEVCNTR5_EL0},
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H A D | AArch64BaseInfo.h | 843 PMEVCNTR5_EL0 = 0xdf45, // 11 011 1110 1000 101 enumerator in enum:llvm::AArch64SysReg::SysRegValues
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/external/llvm/test/MC/AArch64/ |
H A D | basic-a64-instructions.s | 3873 msr PMEVCNTR5_EL0, x12 4127 // CHECK: msr {{pmevcntr5_el0|PMEVCNTR5_EL0}}, x12 // encoding: [0xac,0xe8,0x1b,0xd5] 4428 mrs x9, PMEVCNTR5_EL0 4728 // CHECK: mrs x9, {{pmevcntr5_el0|PMEVCNTR5_EL0}} // encoding: [0xa9,0xe8,0x3b,0xd5]
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