Searched refs:RAI (Results 1 - 10 of 10) sorted by relevance

/external/llvm/lib/CodeGen/
H A DErlangGC.cpp75 MachineBasicBlock::iterator RAI = MI; ++RAI; local
76 MCSymbol* Label = InsertLabel(*MI->getParent(), RAI, MI->getDebugLoc());
H A DGCStrategy.cpp356 MachineBasicBlock::iterator RAI = CI; local
357 ++RAI;
365 MCSymbol* Label = InsertLabel(*CI->getParent(), RAI, CI->getDebugLoc());
H A DMachineBasicBlock.cpp1198 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true);
1199 RAI.isValid(); ++RAI) {
1200 if (MBB->isLiveIn(*RAI))
1201 return (*RAI == Reg) ? LQR_Live : LQR_OverlappingLive;
/external/libcxx/test/containers/sequences/deque/deque.special/
H A Dcopy.pass.cpp51 typedef random_access_iterator<I> RAI; typedef
60 assert(std::copy(c1.cbegin(), c1.cend(), RAI(c2.begin())) == RAI(c2.end()));
62 assert(std::copy(c2.cbegin(), c2.cend(), RAI(c1.begin())) == RAI(c1.end()));
H A Dcopy_backward.pass.cpp51 typedef random_access_iterator<I> RAI; typedef
59 assert(std::copy_backward(c1.cbegin(), c1.cend(), RAI(c2.end())) == RAI(c2.begin()));
61 assert(std::copy_backward(c2.cbegin(), c2.cend(), RAI(c1.end())) == RAI(c1.begin()));
H A Dmove.pass.cpp51 typedef random_access_iterator<I> RAI; typedef
59 assert(std::move(c1.cbegin(), c1.cend(), RAI(c2.begin())) == RAI(c2.end()));
61 assert(std::move(c2.cbegin(), c2.cend(), RAI(c1.begin())) == RAI(c1.end()));
H A Dmove_backward.pass.cpp51 typedef random_access_iterator<I> RAI; typedef
59 assert(std::move_backward(c1.cbegin(), c1.cend(), RAI(c2.end())) == RAI(c2.begin()));
61 assert(std::move_backward(c2.cbegin(), c2.cend(), RAI(c1.end())) == RAI(c1.begin()));
/external/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp754 for (RecIter RAI = ProcModel.ReadAdvanceDefs.begin(),
755 RAE = ProcModel.ReadAdvanceDefs.end(); RAI != RAE; ++RAI) {
756 if (!(*RAI)->isSubClassOf("ReadAdvance"))
758 if (AliasDef == (*RAI)->getValueAsDef("ReadType")
759 || SchedRead.TheDef == (*RAI)->getValueAsDef("ReadType")) {
761 PrintFatalError((*RAI)->getLoc(), "Resources are defined for both "
765 ResDef = *RAI;
H A DCodeGenSchedule.cpp1480 for (RecIter RAI = RADefs.begin(), RAE = RADefs.end(); RAI != RAE; ++RAI) {
1481 Record *ModelDef = (*RAI)->getValueAsDef("SchedModel");
1482 addReadAdvance(*RAI, getProcModel(ModelDef).Index);
1485 for (RecIter RAI = SRADefs.begin(), RAE = SRADefs.end(); RAI != RAE; ++RAI) {
1486 if ((*RAI)->getValueInit("SchedModel")->isComplete()) {
1487 Record *ModelDef = (*RAI)
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/external/srec/config/en.us/dictionary/
H A Dc0.6[all...]

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