/external/compiler-rt/test/asan/TestCases/Linux/ |
H A D | asan_dlopen_test.cc | 11 dlopen(RT, RTLD_LAZY);
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/external/valgrind/main/none/tests/mips64/ |
H A D | macro_int.h | 1 #define TEST1(instruction, RSval, RTval, RD, RS, RT) \ 6 "move $"#RT", %2" "\n\t" \ 12 : #RD, #RS, #RT \ 19 #define TEST2(instruction, RSval, imm, RT, RS) \ 24 "move $"#RT", $zero" "\n\t" \ 26 "move %0, $"#RT "\n\t" \ 29 : #RT, #RS \ 51 #define TEST4(instruction, RSval, RTval, RS, RT) \ 57 "move $"#RT", %3" "\n\t" \ 65 : #RS, #RT \ [all...] |
H A D | cvm_ins.c | 70 #define TESTINST1(instruction, RSVal, RT, RS, p, lenm1) \ 74 "li $" #RT ", 0" "\n\t" \ 77 "move %0, $" #RT "\n\t" \ 80 : #RS, #RT, "cc", "memory" \ 85 #define TESTINST2(instruction, RSVal, RTval, RD, RS, RT) \ 91 "move $" #RT ", %2" "\n\t" \ 96 : #RD, #RS, #RT, "cc", "memory" \ 101 #define TESTINST3(instruction, RSVal, RT, RS,imm) \ 105 "li $" #RT ", 0" "\n\t" \ 108 "move %0, $" #RT "\ [all...] |
H A D | move_instructions.c | 139 #define TEST4(instruction, offset, RTval, FD, FS, RT) \ 143 "move $"#RT", %2" "\n\t" \ 152 : "t0", #RT, "$"#FD, "$"#FS \ 158 #define TEST4d(instruction, offset, RTval, FD, FS, RT) \ 162 "move $"#RT", %2" "\n\t" \ 171 : #RT, "t0", "$"#FD, "$"#FS \
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H A D | load_store_multiple.c | 23 #define TESTINST1(instruction, RTval, offset, RT, RS) \ 28 "li $"#RT", "#RTval "\n\t" \ 33 : #RT, #RS \ 40 "li $"#RT", " #RTval "\n\t" \ 45 : #RT, #RS \ 53 #define TESTINSTsw(RTval, offset, RT, RS) \ 59 "li $"#RT", "#RTval "\n\t" \ 65 : #RT, #RS \
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H A D | branch_and_jump_instructions.c | 107 #define TEST3(instruction, RDval, RSval, RTval, RD, RS, RT) \ 113 "move $"#RT", %2" "\n\t" \ 115 instruction" $"#RS", $"#RT", end"instruction#RDval "\n\t" \ 124 : #RD, #RS, #RT \
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/external/smack/src/org/xbill/DNS/ |
H A D | RTRecord.java | 23 * Creates an RT Record from the given data 32 super(name, Type.RT, dclass, ttl, preference, "preference",
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/external/qemu/disas/ |
H A D | ppc.c | 704 equal the RT field. */ 735 instruction or the RT field in a D, DS, X, XFX or XO form 738 #define RT RS 742 /* The RS and RT fields of the DS form stq instruction, which have 1395 equal the RT field. */ 1763 /* An X_MASK with the RT field fixed. */ 1775 /* An X_MASK with the RT and RA fields fixed. */ 2063 { "macchw", XO(4,172,0,0), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 2064 { "macchw.", XO(4,172,0,1), XO_MASK, PPC405|PPC440, { RT, RA, RB } }, 2065 { "macchwo", XO(4,172,1,0), XO_MASK, PPC405|PPC440, { RT, R 734 #define RT macro [all...] |
/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | ReturnUndefChecker.cpp | 47 QualType RT = CallEvent::getDeclaredResultType(SFC->getDecl()); local 58 if (!RT.isNull() && RT->isVoidType()) 64 if (RT.isNull() && isa<BlockDecl>(SFC->getDecl()) && 72 if (RT.isNull()) 75 if (RT->isReferenceType()) {
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H A D | CastSizeChecker.cpp | 51 const RecordType *RT = ToPointeeTy->getAs<RecordType>(); local 52 if (!RT) 55 const RecordDecl *RD = RT->getDecl();
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H A D | LLVMConventionsChecker.cpp | 31 const RecordType *RT = T->getAs<RecordType>(); local 32 if (!RT) 35 return StringRef(QualType(RT, 0).getAsString()) == 252 if (const RecordType *RT = T->getAs<RecordType>()) { 253 const RecordDecl *RD = RT->getDecl()->getDefinition();
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/external/emma/core/java12/com/vladium/emma/rt/ |
H A D | RT.java | 7 * $Id: RT.java,v 1.2.2.3 2004/07/16 23:32:03 vlad_r Exp $ 27 abstract class RT implements IAppConstants class in inherits:IAppConstants 39 ClassLoader loader = RT.class.getClassLoader (); 84 final Runnable exitHook = new RTExitHook (RT.class, cdata, getCoverageOutFile (), getCoverageOutMerge ()); 89 // the RT classloader is some component loader (e.g, in a J2EE container) 123 // issues of class name collisions and class reloading) or RT.class 124 // (to prevent RT reloading)] 150 if (DEBUG) System.out.println ("RT::dumpCoverageData() DUMPING " + RT.class.getClassLoader ()); 176 private RT () {} // preven method in class:RT [all...] |
H A D | RTExitHook.java | 105 RTExitHook (final Class RT, final ICoverageData cdata, final File outFile, final boolean merge) argument 107 m_RT = RT; 120 private Class m_RT; // keep our RT class pinned in memory
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/external/llvm/tools/lli/ChildTarget/ |
H A D | ChildTarget.cpp | 19 RemoteTarget *RT; member in class:LLIChildTarget 49 ThisChild.RT = new RemoteTarget(); 57 delete ThisChild.RT; 89 RT->stop(); 116 RT->allocateSpace(AllocSize, Alignment, Addr); 135 if (!RT->isAllocatedMemory(Addr, BufferSize)) 166 RT->executeCode(Addr, Result);
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/external/valgrind/main/memcheck/tests/ppc32/ |
H A D | power_ISA2_05.c | 171 int RT; local 181 __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT)); 182 printf("lwarx => %x\n", RT); 187 __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT)); 188 printf("ldarx => %x\n", RT);
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/external/valgrind/main/memcheck/tests/ppc64/ |
H A D | power_ISA2_05.c | 170 int RT; local 180 __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT)); 181 printf("lwarx => %x\n", RT); 186 __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT)); 187 printf("ldarx => %x\n", RT);
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/external/strace/tests/ |
H A D | sigaction.awk | 29 NR == 4 && /^rt_sigaction\(SIGUSR2, {SIG_DFL, ~\[HUP( ((RT|SIGRT)[^] ]+|[3-9][0-9]|1[0-9][0-9]))*\], SA_RESTORER, 0x[0-9a-f]+}, {SIG_DFL, \[\], SA_RESTORER, 0x[0-9a-f]+}, (0x[0-9a-f]+, )?(4|8|16)\) = 0$/ {next} 30 NR == 4 && /^rt_sigaction\(SIGUSR2, {SIG_DFL, ~\[HUP( ((RT|SIGRT)[^] ]+|[3-9][0-9]|1[0-9][0-9]))*\], 0}, {SIG_DFL, \[\], 0}, (4|8|16)(, 0x[0-9a-f]+)?\) = 0$/ {next}
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/external/chromium_org/ui/gfx/geometry/ |
H A D | r_tree_unittest.cc | 14 typedef RTree<int> RT; typedef in class:gfx::RTreeTest 71 void AddStackedSquares(RT* rt, int count) { 80 void VerifyAllKeys(const RT::Matches& keys) { 104 typedef RT::Record RTreeRecord; 806 RT rt(2, 10); 808 RT::Matches results; 818 RT rt(2, 5); 821 RT::Matches results; 831 RT rt(2, 5); 834 RT [all...] |
/external/valgrind/main/none/tests/mips32/ |
H A D | vfp.c | 49 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ 58 "mov.d %0, $" #RT "\n\t" \ 59 "mfc1 %1, $" #RT "\n\t" \ 60 "mfhc1 %2, $" #RT "\n\t" \ 69 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \ 78 "mov.d %0, $" #RT "\n\t" \ 79 "mfc1 %1, $" #RT "\n\t" \ 91 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \ 99 "mov.d %0, $" #RT "\n\t" \ 100 "mfc1 %1, $" #RT "\ [all...] |
H A D | MoveIns.c | 25 #define TESTINSNMOVE(instruction, offset, FS, RT) \ 34 "move %1, $" #RT "\n\t" \ 37 : #RT, "cc", "memory" \ 44 #define TESTINSNMOVEd(instruction, offset, FS, RT) \ 53 "move %1, $" #RT "\n\t" \ 56 : #RT, "cc", "memory" \ 63 #define TESTINSNMOVEt(instruction, offset, FS, RT) \ 69 "lw $" #RT ", "#offset"($t0)\n\t" \ 72 "move %1, $" #RT "\n\t" \ 75 : #RT, "c [all...] |
H A D | LoadStore.c | 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ 29 "li $" #RT", " #RTval"\n\t" \ 34 : #RT, "cc", "memory" \ 41 "li $" #RT", " #RTval"\n\t" \ 46 : #RT, "cc", "memory" \ 54 #define TESTINSTsw(RTval, offset, RT, RS) \ 60 "li $" #RT", " #RTval"\n\t" \ 66 : #RT, #RS, "cc", "memory" \
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H A D | LoadStore1.c | 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \ 29 "li $" #RT", " #RTval"\n\t" \ 34 : #RT, "cc", "memory" \ 41 "li $" #RT", " #RTval"\n\t" \ 46 : #RT, "cc", "memory" \ 54 #define TESTINSTsw(RTval, offset, RT, RS) \ 60 "li $" #RT", " #RTval"\n\t" \ 66 : #RT, #RS, "cc", "memory" \
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/external/clang/lib/CodeGen/ |
H A D | CodeGenTypes.cpp | 159 if (const RecordType *RT = dyn_cast<RecordType>(T)) 160 return isSafeToConvert(RT->getDecl(), CGT, AlreadyChecked); 199 const RecordType *RT = dyn_cast<RecordType>(TT); local 200 if (!RT) return true; 209 return isSafeToConvert(RT->getDecl(), *this); 297 if (const RecordType *RT = dyn_cast<RecordType>(Ty)) 298 return ConvertRecordDeclType(RT->getDecl()); 480 if (const RecordType *RT = FT->getReturnType()->getAs<RecordType>()) 481 ConvertRecordDeclType(RT->getDecl()); 484 if (const RecordType *RT [all...] |
/external/clang/lib/Sema/ |
H A D | SemaStmtAsm.cpp | 441 const RecordType *RT = nullptr; local 444 RT = VD->getType()->getAs<RecordType>(); 446 RT = TD->getUnderlyingType()->getAs<RecordType>(); 448 RT = TD->getTypeForDecl()->getAs<RecordType>(); 449 if (!RT) 452 if (RequireCompleteType(AsmLoc, QualType(RT, 0), 0)) 458 if (!LookupQualifiedName(FieldResult, RT->getDecl())) 466 const ASTRecordLayout &RL = Context.getASTRecordLayout(RT->getDecl());
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/external/clang/lib/AST/ |
H A D | Type.cpp | 366 if (const RecordType *RT = getAs<RecordType>()) 367 return RT->getDecl()->isClass(); 371 if (const RecordType *RT = getAs<RecordType>()) 372 return RT->getDecl()->isStruct(); 376 if (const RecordType *RT = getAs<RecordType>()) 377 return RT->getDecl()->isInterface(); 381 if (const RecordType *RT = getAs<RecordType>()) 382 return RT->getDecl()->isStruct() || RT->getDecl()->isClass() || 383 RT [all...] |