Searched refs:SLLV (Results 1 - 14 of 14) sorted by relevance

/external/chromium_org/v8/src/mips/
H A Dconstants-mips.cc227 case SLLV:
H A Dconstants-mips.h376 SLLV = ((0 << 3) + 4),
H A Dsimulator-mips.cc1943 case SLLV:
H A Dassembler-mips.cc1611 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLLV);
/external/chromium_org/v8/src/mips64/
H A Dconstants-mips64.cc233 case SLLV:
H A Dconstants-mips64.h353 SLLV = ((0 << 3) + 4),
H A Dassembler-mips64.cc1675 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SLLV);
H A Dsimulator-mips64.cc2032 case SLLV:
/external/linux-tools-perf/perf-3.12.0/arch/mips/lib/
H A Dmemcpy.S114 #define SLLV dsllv define
150 #define SLLV sllv define
162 #define SHIFT_DISCARD SLLV
/external/valgrind/main/none/tests/mips64/
H A Dshift_instructions.c9 ROTR, ROTRV, SLL, SLLV, enumerator in enum:__anon33136
170 case SLLV:
/external/pcre/dist/sljit/
H A DsljitNativeMIPS_32.c328 EMIT_SHIFT(SLL, SLLV);
H A DsljitNativeMIPS_64.c423 EMIT_SHIFT(DSLL, DSLL32, SLL, DSLLV, SLLV);
H A DsljitNativeMIPS_common.c166 #define SLLV (HI(0) | LO(4)) macro
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1153 BuildMI(BB, DL, TII->get(Mips::SLLV), Mask)
1156 BuildMI(BB, DL, TII->get(Mips::SLLV), Incr2).addReg(Incr).addReg(ShiftAmt);
1393 BuildMI(BB, DL, TII->get(Mips::SLLV), Mask)
1398 BuildMI(BB, DL, TII->get(Mips::SLLV), ShiftedCmpVal)
1402 BuildMI(BB, DL, TII->get(Mips::SLLV), ShiftedNewVal)

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