| /external/chromium_org/v8/test/cctest/ |
| H A D | test-disasm-mips64.cc | 483 COMPARE(dsrav(a0, a1, a2),
484 "00c52017 dsrav a0, a1, a2");
485 COMPARE(dsrav(s0, s1, s2),
486 "02518017 dsrav s0, s1, s2");
487 COMPARE(dsrav(a6, a7, t0),
488 "018b5017 dsrav a6, a7, t0");
489 COMPARE(dsrav(v0, v1, fp),
490 "03c31017 dsrav v0, v1, fp");
|
| /external/llvm/test/MC/Mips/mips3/ |
| H A D | valid.s | 71 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
74 dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
|
| /external/llvm/test/MC/Mips/mips4/ |
| H A D | valid.s | 73 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
76 dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
|
| /external/llvm/test/MC/Mips/mips5/ |
| H A D | valid.s | 73 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
76 dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
|
| /external/llvm/test/MC/Mips/mips64/ |
| H A D | valid.s | 78 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
81 dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| H A D | valid.s | 86 dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
89 dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x17]
|
| /external/llvm/test/MC/Mips/mips2/ |
| H A D | invalid-mips3.s | 34 dsrav $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips4.s | 37 dsrav $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips5.s | 36 dsrav $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips1/ |
| H A D | invalid-mips3.s | 38 dsrav $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips4.s | 39 dsrav $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| H A D | invalid-mips5.s | 38 dsrav $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/chromium_org/v8/src/mips64/ |
| H A D | assembler-mips64.h | 810 void dsrav(Register rd, Register rt, Register rs);
|
| H A D | assembler-mips64.cc | 1760 void Assembler::dsrav(Register rd, Register rt, Register rs) { function in class:v8::Assembler
|
| H A D | full-codegen-mips64.cc | 2378 __ dsrav(right, left, scratch1);
|